SPC564A80L7 datasheet(32/157 Pages) STMICROELECTRONICS

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Introduction

SPC564A74L7, SPC564A80B4, SPC564A80L7

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Doc ID 15399 Rev 9

1.6.2

Block summary

Table 3 summarizes the functions of the blocks present on the SPC564A80 series

microcontrollers.

Table 3.

SPC564A80 series block summary

Block

Function

Boot assist module (BAM)

Block of read-only memory containing executable code that searches

for user-supplied boot code and, if none is found, executes the BAM

boot code resident in device ROM.

Calibration Bus interface

Transfers data across the crossbar switch to/from peripherals

attached to the calibration tool connector.

Controller area network (FlexCAN)

Supports the standard CAN communications protocol.

Crossbar switch (XBAR)

Internal busmaster.

Cyclic redundancy check (CRC)

CRC checksum generator.

Deserial serial peripheral interface (DSPI)

Provides a synchronous serial interface for communication with

external devices.

e200z4 core

Executes programs and interrupt handlers.

Enhanced direct memory access (eDMA)

Performs complex data movements with minimal intervention from

the core.

Enhanced modular input-output system

(eMIOS)

Provides the functionality to generate or measure events.

Enhanced queued analog-to-digital

converter (eQADC)

Provides accurate and fast conversions for a wide range of

applications.

Enhanced serial communication interface

(eSCI)

Provides asynchronous serial communication capability with

peripheral devices and other microcontroller units.

Enhanced time processor unit (eTPU2)

Second-generation co-processor processes real-time input events,

performs output waveform generation, and accesses shared data

without host intervention.

Error Correction Status Module (ECSM)

The Error Correction Status Module supports a number of

miscellaneous control functions for the platform, and includes

registers for capturing information on platform memory errors if error-

correcting codes (ECC) are implemented

External bus interface (EBI)

Enables expansion of internal bus to enable connection of external

memory or peripherals.

Flash memory

Provides storage for program code, constants, and variables.

FlexRay

Provides high-speed distributed control for advanced automotive

applications.

Interrupt controller (INTC)

Provides priority-based preemptive scheduling of interrupt requests.

JTAG controller

Provides the means to test chip functionality and connectivity while

remaining transparent to system logic when not in test mode.

Memory protection unit (MPU)

Provides hardware access control for all memory references

generated.

Nexus port controller (NPC)

Provides real-time development support capabilities in compliance

with the IEEE-ISTO 5001-2003 standard.

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