SPC564A80L7 datasheet(28/157 Pages) STMICROELECTRONICS

28 / 157 page

Introduction

SPC564A74L7, SPC564A80B4, SPC564A80L7

28/157

Doc ID 15399 Rev 9

The Error Correction Status Module supports a number of miscellaneous control functions

for the platform. The ECSM includes these features:

●

Registers for capturing information on platform memory errors if error-correcting codes

(ECC) are implemented

●

For test purposes, optional registers to specify the generation of double-bit memory

errors are enabled on the SPC564A80.

The sources of the ECC errors are:

●

Flash

●

SRAM

●

Peripheral RAM (FlexRay, CAN, eTPU2 Parameter RAM)

1.5.22

External bus interface (EBI)

The SPC564A80 device features an external bus interface that is available in PBGA324 and

calibration packages.

The EBI supports operation at frequencies of system clock /1, /2 and /4, with a maximum

frequency support of 80 MHz. Customers running the device at 120 MHz or 132 MHz will

use the /2 divider, giving an EBI frequency of 60 MHz or 66 MHz. Customers running the

device at 80 MHz will be able to use the /1 divider to have the EBI run at the full 80 MHz

frequency.

Features include:

●

1.8 V to 3.3 V ± 10% I/O (1.6 V to 3.6 V)

●

Memory controller with support for various memory types

●

16-bit data bus, up to 22-bit address bus

●

Pin muxing included to support 32-bit muxed bus

●

Selectable drive strength

●

Configurable bus speed modes

●

Bus monitor

●

Configurable wait states

1.5.23

Calibration EBI

The Calibration EBI controls data transfer across the crossbar switch to/from memories or

peripherals attached to the calibration tool connector in the calibration address space. The

Calibration EBI is only available in the calibration tool.

Features include:

●

1.8 V to 3.3 V ± 10% I/O (1.6 V to 3.6 V)

●

Memory controller supports various memory types

●

16-bit data bus, up to 22-bit address bus

●

Pin muxing supports 32-bit muxed bus

●

Selectable drive strength

●

Configurable bus speed modes

●

Bus monitor

●

Configurable wait states

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