D950-CORE datasheet(85/89 Pages) STMICROELECTRONICS

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D950-Core

7.5.2 Registers

There are two types of registers for the EMU, data registers, and control and status registers.

They are mapped in the Y-memory space.

Data Registers

BP0, BP1, BP2, BP3: Breakpoint registers

0, 1, 2, 3 values. 16-bit breakpoint registers allowing breakpoints.

BPC: Breakpoint Counter register. This 16-bit register is initialized by a load instruction and

decremented each time a valid condition is met on a count enabled breakpoint. Breakpoints

with and without a count condition can be set simultaneously. After reset, BPC is not initialized.

PCB: Program Counter Trace Buffer register allows the user to keep trace of the PC value for

the six last executed instructions. PCB stores one address value per instruction, whatever the

instruction type (single cycle, single word, multiple cycles, multiple words)

Control and Status Registers

Three breakpoint control registers allow simple or multiple breakpoints (conditional or not) to

be set and counting breakpoint events to be enabled..

Breakpoint Register

Breakpoint Location

Bus

BP3

Program memory address

IA or YD

BP2

or Data memory data

IA or XD

BP1

Data memory

XA or

BP0

Address

D950-CORE Datasheet(PDF) 85 Page - STMicroelectronics