ATtiny88 datasheet(18/266 Pages) ATMEL

18 / 266 page

8008C–AVR–03/09

ATtiny48/88

Figure 5-3.

On-chip Data SRAM Access Cycles

5.3

EEPROM Data Memory

ATtiny48/88 devices contain 64 bytes of data EEPROM memory, organized as a separate data

space in which single bytes can be read and written. The EEPROM has an endurance of at least

100,000 write/erase cycles. The access between the EEPROM and the CPU is described in the

following, specifying the EEPROM Address Registers, the EEPROM Data Register, and the

EEPROM Control Register.

“Memory Programming” on page 184 contains a detailed description on EEPROM Programming

in SPI or Parallel Programming mode.

5.3.1

EEPROM Read/Write Access

The EEPROM Access Registers are located in I/O space.

The write access time for the EEPROM is given in Table 5-2. A self-timing function, however,

lets the user software detect when the next byte can be written. If the user code contains instruc-

tions that write the EEPROM, some precautions must be taken. In heavily filtered power

supplies, V

CC is likely to rise or fall slowly on power-up/down. This causes the device for some

period of time to run at a voltage lower than specified as minimum for the clock frequency used.

See “Preventing EEPROM Corruption” on page 21 for details on how to avoid problems in these

situations.

In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.

Refer to “Atomic Byte Programming” on page 18 and “Split Byte Programming” on page 19 for

details on this.

When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is

executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next

instruction is executed.

5.3.2

Atomic Byte Programming

The simplest programming method is called Atomic Byte Programming. When writing a byte to

the EEPROM, the user must write the address into register EEAR and data into register EEDR.

clk

Data

Address

Address valid

Compute Address

CPU

Memory Access Instruction

Next Instruction

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