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ATtiny88 Datasheet(PDF) 43 Page - ATMEL Corporation |
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ATtiny88 Datasheet(HTML) 43 Page - ATMEL Corporation |
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43 / 266 page ![]() 43 8008C–AVR–03/09 ATtiny48/88 To prevent unintentional disabling of the Watchdog or unintentional change of time-out period, two different safety levels are selected by the fuse WDTON as shown in Table 8-1. See “Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 43 for details. Figure 8-7. Watchdog Timer 8.4.1 Timed Sequences for Changing the Configuration of the Watchdog Timer The sequence for changing configuration differs slightly between the two safety levels. Separate procedures are described for each level. 8.4.2 Safety Level 1 In this mode, the Watchdog Timer is initially disabled, but can be enabled by writing the WDE bit to one without any restriction. A timed sequence is needed when disabling an enabled Watch- dog Timer. To disable an enabled Watchdog Timer, the following procedure must be followed: 1. In the same operation, write a logic one to WDCE and WDE. A logic one must be writ- ten to WDE regardless of the previous value of the WDE bit. 2. Within the next four clock cycles, in the same operation, write the WDE and WDP bits as desired, but with the WDCE bit cleared. 8.4.3 Safety Level 2 In this mode, the Watchdog Timer is always enabled, and the WDE bit will always read as one. A timed sequence is needed when changing the Watchdog Time-out period. To change the Watchdog Time-out, the following procedure must be followed: 1. In the same operation, write a logical one to WDCE and WDE. Even though the WDE always is set, the WDE must be written to one to start the timed sequence. 2. Within the next four clock cycles, in the same operation, write the WDP bits as desired, but with the WDCE bit cleare d. The value written to the WDE bit is irrelevant. Table 8-1. WDT Configuration as a Function of the WDTON Fuse Setting WDTON Safety Level WDT Initial State Disable WDT Change Time-out Unprogrammed 1 Disabled Timed sequence No limitations Programmed 2 Enabled Always enabled Timed sequence 128kHz OSCILLATOR WDP0 WDP1 WDP2 WDP3 WATCHDOG RESET WDE WDIF WDIE MCU RESET INTERRUPT |
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