AD-DPGIOZ datasheet(35/61 Pages) AD

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Data Sheet

AD9961/AD9963

Rev. A | Page 35 of 60

RECEIVE PATH

Rx Path General Description

The AD9961/AD9963 Rx paths consist of dual, differential

input, 100 MSPS ADCs followed by an optional 2× decimation

filter. The Rx path also has digital offset and gain adjustments.

RXIP

TRXD[11:0]

RXIN

DECIMATION

SCALE

DATA

ASSEMBLER

RXQN

I OFFSET

Q OFFSET

RXQP

TRXIQ

TRXCLK

LPF

1/2

LPF

1/2

I ADC

Q ADC

Figure 39. Receive Path Block Diagram

The dual ADC paths share the same clocking and reference

circuitry to provide optimal matching characteristics. The

ADCs have a multistage differential pipelined switched

capacitor architecture with output error correction logic. The

ADCs support IF sampling frequencies up to 140 MHz, making

them suitable for undersampling receivers. Also, one of the

ADCs can be powered down and the digital interface can be

placed into single ADC mode. This flexibility makes the part

well-suited for sampling real signals as well.

RECEIVE ADC OPERATION

The Rx path analog inputs look into a nominal differential

impedance of 4 kΩ. The Rx inputs are self-biasing, so they can

be either ac-coupled or direct coupled. The nominal dc bias

level of the inputs is 1.4 volts. A buffered version of the bias

voltage is available at the RXCML pin. This voltage can be used

for biasing external buffer circuits when dc coupling is required.

For optimal dynamic performance, the analog inputs should be

driven differentially. The source impedances driving the Rx

inputs should be matched so that common-mode settling errors

are symmetrical. The Rx inputs can be driven with a single-

ended source, but SNR and SINAD performance is degraded.

ADC Reference Voltage

An internal differential voltage reference creates positive and

negative reference voltages that define the full-scale input

voltage of the ADCs. This full-scale input voltage range can be

adjusted by means of the RX_FSADJ[4:0] parameter in

configuration Register 0x7D. See the Configuration Registers

section for more details on setting the voltage.

The nominal input voltage range is 1.56 V. In general, a tradeoff

can be made between linearity and SNR. Increasing the input

voltage range leads to higher SNR. Decreasing the input voltage

range leads to better linearity.

RXBIAS

The AD9961/AD9963 provide the user with the option to place

a 10 kΩ resistor between the RXBIAS pin and ground. This

resistor is used to set the master current reference of the ADC

core. The RXBIAS resistor should have a tolerance of 1% or

better to preserve the accuracy of the ADC full-scale range.

Care should be taken in the layout to avoid any noise from

coupling into the RXBIAS pin.

RXCML

The RXCML pin of the AD9961/AD9963 provides the user with

a buffered version of the expected ADC common-mode bias

voltage. The RXCML output nominally is at 1.4 V. Bypassing

the RXCML output to analog ground maintains the stability of

the output buffer and lowers the noise. To maintain the

accuracy of the RXCML bias voltage, the current draw from the

pin should be kept below 1 mA.

REG 0x7E[0]

REG 0x0F[1]

RXIP

RXIN

RXQP

RXQN

RXCML

2kΩ

~1.4V

IADC

QADC

CMBIAS

AD9961/AD9963

2kΩ

Figure 40. Simplified Schematic of Rx Path Inputs

Differential Input Configurations

Optimum performance is achieved by driving the analog inputs

in a differential input configuration. For baseband applications,

the ADA4937 differential driver provides excellent performance

and a flexible interface to the ADC.

Figure 41 shows an ac-coupled input configuration. The VOCM

pin should be connected to a voltage that provides sufficient

headroom for the output driver of the differential amp. Usually,

setting VOCM to ½ of the amplifier supply voltage is the optimal

setting. Placing source resistance in series with the amplifiers

outputs isolates the amplifier from on-board parasitic capacitances

and leads to more stable operation.

AD-DPGIOZ Datasheet(PDF) 35 Page - Analog Devices

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