AD-DPGIOZ datasheet(20/61 Pages) AD

20 / 61 page

AD9961/AD9963

Data Sheet

Rev. A | Page 20 of 60

SERIAL CONTROL PORT

The AD9961/AD9963 serial control ports are a flexible,

synchronous, serial communications port that allows an easy

interface with many industry-standard microcontrollers and

microprocessors. The AD9961/AD9963 serial control ports are

compatible with most synchronous transfer formats, including

both the Motorola SPI and Intel® SSR® protocols. The serial

control port allows read/write access to all registers that

configure the AD9961/AD9963. Single or multiple byte

transfers are supported, as well as MSB first or LSB first transfer

formats.

Serial Control Port Pin Descriptions

The serial control port has three pins, SCLK, SDIO, and CS:

•

SCLK (serial clock) is the input clock used to register serial

control port reads and writes. Write data bits are registered

on the rising edge of this clock, and read data bits are

registered on the falling edge. This pin is internally pulled

down by a 30 kΩ resistor to ground.

•

SDIO (serial data input/output) functions as both the

input and output data pin.

•

CS (chip select bar) is an active low control that gates the

read and write cycles. When CS is high, SDIO is in a high

impedance state and SCLK is disabled. This pin is

internally pulled up by a 30 kΩ resistor to DRVDD.

GENERAL OPERATION OF SERIAL CONTROL PORT

The falling edge of CS, in conjunction with the rising edge of

SCLK, determines the start of a communication cycle. There

are two parts to a communication cycle with the AD9961/

AD9963. The first part writes a 16-bit instruction word into the

AD9961/AD9963, coincident with the first 16 SCLK rising

edges. The instruction word provides the AD9961/AD9963

serial control ports with information regarding the data

transfer, which is the second part of the communication cycle.

The instruction word defines whether the upcoming data

transfer is a read or a write, the number of bytes in the data

transfer, and the starting register address for the first byte of the

data transfer.

Instruction Header

The MSB of the instruction word is R/W, which indicates

whether the serial port transfer is a read or a write. The next

two bits, N1:N0, indicate the length of the transfer in bytes. The

final 13 bits are the address (A12 to A0) at which to begin the

read or write operation.

For a write, the instruction word is followed by the number of

bytes of data indicated by Bit N1 to Bit N0 (see Table 10).

Table 10. Byte Transfer Count

Bytes to Transfer

Streaming mode

A12 to A0 select the address within the register map that is

written to or read from during the data transfer portion of the

communications cycle. For multibyte transfers, the address is

the starting byte address.

Only Address Bits[A7:A0] are needed to cover the range of

the 0xFF registers used by the AD9961/AD9963. Address

Bits[A12:A8] must always be 0.

Write Transfer

If the instruction header indicates a write operation, the bytes

of data written onto the SDIO line are loaded into the serial

control port buffer of the AD9961/AD9963. Data bits are

registered on the rising edge of SCLK.

The length of the transfer (1 byte, 2 byte, 3 bytes, or streaming

mode) is indicated by two bits (N1:N0) in the instruction byte.

During a write, streaming mode does not skip over unused or

reserved registers; therefore, the user must know what bit

pattern to write to the reserved registers to preserve proper

operation of the part. It does not matter what data is written to

unused registers.

Read Transfer

If the instruction word is for a read operation, the next N × 8

SCLK cycles clock out the data from the address specified in the

instruction word, where N is 1 to 3 as determined by N1:N0.

If N = 4, the read operation is in streaming mode, and

continues until CS is raised. Streaming mode does not skip over

reserved or unused registers. The readback data is valid on the

falling edge of SCLK.

MSB/LSB First Transfers

The AD9961/AD9963 instruction word and byte data formats

can be selected to be MSB first or LSB first. The default for the

AD9961/AD9963 is MSB first. When MSB first mode is active,

the instruction and data bytes must be written from MSB to

LSB. Multibyte data transfers in MSB first format start with an

instruction byte that includes the register address of the most

significant data byte. Subsequent data bytes must follow in

order from the high address to the low address. In MSB first

mode, the serial control port internal address generator

decrements for each data byte of the multibyte transfer cycle.

When LSB first is active, the instruction and data bytes must be

written from LSB to MSB. Multibyte data transfers in LSB first

format start with an instruction byte that includes the register

address of the least significant data byte followed by multiple data

bytes. The internal byte address generator of the serial control

port increments for each byte of the multibyte transfer cycle.

AD-DPGIOZ Datasheet(PDF) 20 Page - Analog Devices

AD-DPGIOZ Datasheet(HTML) 20 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61

Datasheet Download

Link URL