AD-DPGIOZ datasheet(12/61 Pages) AD

12 / 61 page

AD9961/AD9963

Data Sheet

Rev. A | Page 12 of 60

Pin No.

Mnemonic

Description

DLLFILT

DLL Filter Output.

CLK18V

Output of CLK18V Voltage Regulator.

56,57

CLKN, CLKP

Differential Input Clock.

CLK33V

Input to CLK18V and DLL18V Voltage Regulators (1.8 V to 3.3 V). If LDOs are not being used, short Pin 58

to Pin 55. CLK33V must track TXVDD.

59, 60

TXQN, TXQP

Complementary DAC Q Current Outputs.

61, 67

TXVDD

Analog Supply Voltage for Tx Path (1.8 V to 3.3V). TXVDD must track CLK33V.

TXCML

Common-Mode Input Voltage for the I and Q Tx DACs.

REFIO

Decoupling Point for Internal DAC 1.0 V Bandgap Reference. Use a 0.1 µF capacitor to AGND.

TXGND

Transmit Path Ground.

65, 66

TXIP, TXIN

Complementary DAC I Current Outputs.

DAC12B

Auxiliary DAC B Output.

DAC12A

Auxiliary DAC A Output.

AUXIO3

Selectable Analog Pin. Programmable to either Input 3 of the auxiliary ADC or to the auxiliary DAC10B

output.

AUXIO2

Selectable Analog Pin. Programmable to either Input 2 of the auxiliary ADC or to the auxiliary DAC10A

output.

AUXIN1

Input 1 of Auxiliary ADC.

EPAD

Thermal Pad Under Chip. This must be connected to AGND for proper chip operation. It provides both a

thermal and electrical connection to the PCB.

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