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AD-DPGIOZ Datasheet(PDF) 24 Page - Analog Devices |
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AD-DPGIOZ Datasheet(HTML) 24 Page - Analog Devices |
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24 / 61 page  AD9961/AD9963 Data Sheet Rev. A | Page 24 of 60 Addr Default Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x71 0x00 ADCCLKSEL DACCLKSEL Unused DLL_REF_EN N[3:0] 0x72 0x01 DLL_Locked DLLDIV M[4:0] 0x75 0x00 0 DLL_RESB 0 0x77 0x00 CONV_TIME[1:0] Unused AUXADC_CH[2:0] 0x78 Varies AUXADC[11:4] 0x79 Varies AUXADC[3:0] CONV_COMPL CHAN_SEL[2:0] 0x7A 0x00 AUXADC_EN AUXADC_RESB Unused AUXDIV[2:0] 0x7B 0x00 TMPSNS_EN Unused AUXREF_ADJ[2:0] Unused 0x7D 0x00 Unused RX_FSADJ[4:0] 0x7E 0x00 Unused RXTrim_EN RXTrim_Fine AUXCML_EN 0 RX_DC 0x7F 0x00 RXI_Trim[9:2] 0x80 0x00 Unused RXI_Trim[1:0] GAINCAL_ ENI 0x81 0x00 RXQ_Trim[9:2] 0x82 0x00 Unused RXQ_Trim[1:0] GAINCAL_ ENQ 0xFF 0x00 Unused Update CONFIGURATION REGISTER BIT DESCRIPTIONS Table 15. Register Name Register Address Bit(s) Parameter Function Serial Port Config 0x00 7, 0 SDIO 0: use SDIO as both input and output data 1: use SDIO pin as input data only 6, 1 LSB_First 0: first bit of serial data is MSB of data byte. 1: first bit of serial data is LSB of data byte. 5, 2 RESET A transition from 0 to 1 on this bit resets the device. All registers but Register 0x00 revert to their default values. ADC Address 0x05 1:0 ADDRQ, ADDRI Bits are set to determine which device on chip receives ADC specific write commands. ADC specific write commends include writes to Registers 0x0F and Register 0x10. These writes also require a rising end on the Update bit (Register 0xFF, Bit 0). 00: no ADCs are addressed. 01: I ADC is addressed. 10: Q ADC is addressed 11: both I and Q ADCs are addressed. CM Buffer Enable 0x0F 1 RXCML Enable control for the RXCML output buffer. Note that updating this bit also requires writing to Register 0x05 and Register 0xFF as described in the Sub Serial Interface Communications section. 0: RXCML pin is high impedance. 1: RXCML pin is a low impedance 1.4 V output. ADC Offset 0x10 5:0 ADC_OFFSET[5:0] Adds a dc offset to the ADC output of whichever ADC is addressed by Register 0x05. The offset applied is as follows: 011111: offset = +31 LSBs … 000001: offset = +1 LSB 000000: offset = 0 LSB 111111: offset = −1 LSB … 100000: offset = −32 LSBs Digital Filters 0x30 7:6 Unused 5 DEC_BP 1: bypass 2× decimator in Rx path (D0). 4 INT1_BP 1: bypass 2× Half-Band Interpolation Filter 1 (INT1). 3 INT0_BP 1: bypass 2× Half-Band Interpolation Filter 0 (INT0). |
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