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DP83821 Datasheet(PDF) 17 Page - National Semiconductor (TI) |
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DP83821 Datasheet(HTML) 17 Page - National Semiconductor (TI) |
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17 / 86 page ![]() 3.0 Functional Description (Continued) 17 www.national.com 3.9 EEPROM Interface The DP83821 supports the attachment of an external EEPROM. The EEPROM interface provides the ability for the DP83821 to read from and write data to an external serial EEPROM device. Values in the external EEPROM allow default fields in PCI configuration space and I/O space to be overridden following a hardware reset. The DP83821 will "autoload" values from the EEPROM to these fields in configuration space and I/O space and perform a checksum to verify that the data is valid. If the EEPROM is not present, the DP83821 initialization uses default values for the appropriate Configuration and Operational Registers. Software can read and write to the EEPROM using “bit-bang” accesses via the MII/EEPROM Access Register (MEAR). 3.10 Boot ROM Interface The BIOS ROM interface allows the DP83821 to read from and write data to an external PROM/Flash device. 3.11 Power Management and Wake Functions The DP83821 is compliant with the PCI Power Management Specification v1.1. The device can be programmed to any of the powered states (D0, D1, D2, D3hot) and enabled to assert its PMEN pin through the Configuration Register PMCSR. In addition, the device will enter the D3cold state when PCI power is dropped, regardless of the programmed power state. In either D3hot or D3cold, if PMEN assertion is enabled, the device will keep the receiver alive so that it may recognize wake packets and signal the system to wake up; if PMEN assertion is not enabled, the device will go to sleep and be unable to receive packets. The DP83821 supports several types of wake events that will signal the power management logic to assert PMEN. These are detailed in the Wake On LAN section (4.2.18.1). In order for the device to request a system wake, at least one wake event must be configured in the Wake Command and Status Register (WCSR). If PMEN assertion is enabled and the device enters the D3cold state with no wake events enabled, the device will go to sleep. When the device is in a power management state other than D0 (the fully alive state), the only PCI bus activity it may initiate is the assertion of PMEN. This means any packets received will remain in the receive FIFO until the device is returned to the fully alive state. Upon waking up, the wake packet is available in the receive FIFO. In any power state, enabling PMEN assertion adds additional packet filtering: only those packet types that are configured as wake packets in WCSR will be accepted. This prevents non-wake packets from filling the receive FIFO while the device is in a low power state and preventing a wake packet from being accepted. It is expected that while in the fully alive state, PMEN assertion will be disabled to eliminate the extra level of filtering. 3.12 Network Management Functions The DP83821 allows compliance with several layer management standards to allow a node to monitor overall network performance. These standards are: — RFC 1213 (MIB II), — RFC 1643 (Ether-like MIB), and — IEEE 802.2 Layer Management. Many of the counters required by these standards are easily maintained in software during normal per-packet processing. Those counters that would either be difficult or impossible for software to maintain are provided for in hardware (See Section 4.2.27). The table below outlines each required counter, the relevant standard, and how the counter should be maintained. Table 3-1 MIB Compliance Counter Name Reference Maintained by Derivation RXOctetsOK RFC 1213, 802.3 LM software, add cmdsts.SIZE on receive packets with cmdsts.OK bit set. The byte count of each successfully received packet is added to this counter. The packet byte count includes the address, type, data, and FCS fields. RXFramesOK 802.3 LM software, increment on receive packets with cmdsts.OK bit set. This counter is incremented for each packet successfully received (this includes broadcast, multicast, and physical address packets). RXBroadcastPkts RFC 1213, 802.3 LM software, increment on receive packets with cmdsts.OK set and cmdsts.DEST set to 11. This counter is incremented for each broadcast packet successfully received. RXMulticastPkts RFC 1213, 802.3 LM software, increment on receive packets with cmdsts.OK set and cmdsts.DEST set to 10. This counter is incremented for each multicast packet successfully received. RXErroredPkts RFC 1213 hardware, see MIB:RxErroredPkts. This counter is incremented for each packet received with errors. This count includes packets which are automatically rejected from the FIFO due to both wire errors and FIFO overruns. |
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