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ST20-GP6 Datasheet(PDF) 65 Page - STMicroelectronics |
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ST20-GP6 Datasheet(HTML) 65 Page - STMicroelectronics |
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65 / 123 page  ST20-GP6 65/123 10.5 Boot source The CPU boots from ROM, unless the diagnostic control unit (DCU) is configured (via the TAP) to start in diagnostic mode: in which case code is loaded, and the CPU booted, via the DCU. 10.6 Default configuration The default configuration is loaded into all four banks on reset. It allows the EMI to read data from a slow ROM memory. The default parameters are given in Table 10.10. . Parameter Default value DataDriveDelay 101 (5 phases) BusReleaseTime 10 (2 cycles) CEactive 01 (active during read only) OEactive 01 (active during read only) BEactive 00 (inactive) Portsize Determined by the BusWidth signal DeviceType 001 (SRAM/peripheral) AccessTimeRead 1000 (8+2=10 cycles) CEe1TimeRead 00 (0 phases) CEe2TimeRead 00 (0 phases) OEe1TimeRead 00 (0 phases) OEe2TimeRead 00 (0 phases) LatchPoint 0 (1 cycle before end of access cycle) Table 10.10 Default configuration |
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