| Electronic Components Datasheet Search |
|
PPC440GX-3RF800C Datasheet(PDF) 61 Page - Applied Micro Circuits Corporation |
|
|
|||||||||||||||||||||||||||||
PPC440GX-3RF800C Datasheet(HTML) 61 Page - Applied Micro Circuits Corporation |
|
61 / 93 page ![]() 440GX – Power PC 440GX Embedded Processor AMCC 61 Revision 1.15 – August 30, 2007 Data Sheet Recommended DC Operating Conditions Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended conditions can affect device reliability. Parameter Symbol Minimum Typical Maximum Unit Notes Logic Supply Voltage (500MHz Rev A and 533MHz) VDD +1.4 +1.5 +1.6 V 4 Logic Supply Voltage (667MHz and 800MHz) VDD +1.5 +1.55 +1.6 V 4 I/O Supply Voltage OVDD +3.0 +3.3 +3.6 V 4 DDR SDRAM Supply Voltage (DDR clock up to 166MHz) SVDD +2.3 +2.5 +2.7 V 4 DDR SDRAM Supply Voltage (DDR clock = 200MHz) SVDD +2.5 +2.6 +2.7 V 4 PLL Supply Voltages (500MHz Rev A and 533MHz) AxVDD +1.4 +1.5 +1.6 V 3 PLL Supply Voltage (667MHz and 800MHz) AxVDD +1.5 +1.55 +1.6 V 3 DDR SDRAM Reference Voltage SVREF +1.15 +1.25 +1.35 V 3 Input Logic High (2.5V SSTL) VIH SVREF+0.18 SVDD+0.3 V2 Input Logic High (2.5V CMOS, 3.3V tolerant receiver) 1.7 V Input Logic High (3.3V PCI-X) 0.5OVDD OVDD+0.5 V1 Input Logic High (3.3V LVTTL) +2.0 +3.6 V Input Logic Low (2.5V SSTL) VIL -0.3 SVREF-0.18 V Input Logic Low (2.5V CMOS, 3.3V tolerant receiver) 0.7 V Input Logic Low (3.3V PCI-X) -0.5 0.35OVDD V1 Input Logic Low (3.3V LVTTL) 0 +0.8 V Output Logic High (2.5V SSTL) VOH +1.95 SVDD V Output Logic High (2.5V CMOS, 3.3V tolerant receiver) 2.0 V Output Logic High (3.3V PCI-X) 0.9OVDD OVDD V1 Output Logic High (3.3V LVTTL) +2.4 OVDD V Output Logic Low (2.5V SSTL) VOL 00.55 V Output Logic Low (2.5V CMOS, 3.3V tolerant receiver) 0.4 V Output Logic Low (3.3V PCI-X) 0.1OVDD V1 Output Logic Low (3.3V LVTTL) 0 +0.4 V Input Leakage Current (No pull-up or pull-down) IIL1 00 μA Input Leakage Current for Pull-Down IIL2 0 (LPDL) 200 (MPUL) μA 5 Input Leakage Current for Pull-Up IIL3 -150 (LPDL) 0 (MPUL) μA 5 Input Max Allowable Overshoot (3.3V LVTTL) VIMAO +3.9 V Input Max Allowable Undershoot (3.3V LVTTL) VIMAU -0.6 V |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |