STPM32 datasheet(62/89 Pages) STMICROELECTRONICS

62 / 89 page

Figure 58. Register map 5

10.2

Configuration register

Table 41. Row 0, DSP control register 1 (DSP_CR1)

Bit

Internal signal

Description

Default

[3:0]

CLRSS_TO1

Set duration of primary channel reset signal to clear sag and swell

registers

0x0

ClearSS1

Clear sag and swell time register and history bits for primary channel,

auto-reset to '0'

0x0

ENVREF1

Enable internal voltage reference for primary channel:

0: reference disabled – external VREF required

1: reference enabled

0x1

[8:6]

TC1

Temperature compensation coefficient selection for primary channel

voltage reference VREF1 (see Table 8)

0x2

[16:9]

Reserved

0x0

AEM1

Apparent energy mode for primary channel:

0: use apparent RMS power

1: use apparent vectorial power

0x0

APM1

Apparent vectorial power mode for primary channel:

0: use fundamental power

1: use active power

0x0

BHPFV1

Bypass hi-pass filter for primary voltage channel:

0: HPF enabled

1: HPF bypassed

0x0

BHPFC1

Bypass hi-pass filter for primary current channel:

0: HPF enabled

1: HPF bypassed

0x0

ROC1

Add Rogowski integrator to primary current channel filtering pipeline:

0: integrator bypassed

1: integrator enabled

0x0

[23:22]

Reserved

0x0

[27:24]

LPW1

LED1 speed dividing factor: 0x0 = 2^(-4), 0xF = 2^11 Default 0x4 = 1

0x4

[29:28]

LPS1

LED1 pulse-out power selection: LPS1 [1:0]: 00,01,10,11

LED1 output: active, fundamental, reactive, apparent

0x0

STPM32, STPM33, STPM34

Configuration register

DS10272 - Rev 13

page 62/89

STPM32 Datasheet(PDF) 62 Page - STMicroelectronics

STPM32 Datasheet(HTML) 62 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

Datasheet Download

Link URL