STPM32 datasheet(87/89 Pages) STMICROELECTRONICS

87 / 89 page

List of figures

Figure 1.

STPM34 block diagram .............................................................. 2

Figure 2.

STPM33 block diagram .............................................................. 3

Figure 3.

STPM32 block diagram .............................................................. 3

Figure 4.

STPM34 pinout (top view), QFN32L 5x5x1 ................................................. 4

Figure 5.

STPM33 pinout (top view), QFN32L 5x5x1 ................................................. 4

Figure 6.

STPM32 pinout (top view), QFN24L 4x4x1 ................................................. 5

Figure 7.

SPI timings ..................................................................... 11

Figure 8.

SPI enable and disable timing diagrams.................................................. 11

Figure 9.

UART enable and disable timing diagrams ................................................ 12

Figure 10.

Output load circuit for enable and disable times ............................................ 12

Figure 11.

STPM34 application schematic ........................................................ 14

Figure 12.

Active energy error vs. current gain=2x integrator off ......................................... 17

Figure 13.

Active energy error vs. current gain=16x integrator off ........................................ 17

Figure 14.

Active energy error vs. frequency gain=2x integrator off ....................................... 17

Figure 15.

Active energy error vs. frequency gain=16x integrator off ...................................... 17

Figure 16.

Reactive energy error vs. current gain=2x integrator off ....................................... 18

Figure 17.

Reactive energy error vs. current gain=16x integrator off ...................................... 18

Figure 18.

Reactive energy error vs. frequency gain=2x integrator off ..................................... 18

Figure 19.

. Reactive energy error vs. frequency gain=16x integrator off ................................... 18

Figure 20.

Active energy error vs. current gain=16x integrator on ........................................ 18

Figure 21.

Reactive energy error vs. current gain=16x integrator on ...................................... 18

Figure 22.

Power management internal connection scheme and polarization ................................ 20

Figure 23.

Temperature compensation typical curves ................................................ 21

Figure 24.

Analog front end internal scheme ...................................................... 22

Figure 25.

Block diagram of the modulator........................................................ 22

Figure 26.

Different oscillator circuits (a): with quartz; (b): with external source ............................... 23

Figure 27.

Clock feed for multiple devices ........................................................ 24

Figure 28.

Power-on-reset sequence ........................................................... 24

Figure 29.

Global startup reset................................................................ 25

Figure 30.

DSP block functional description ....................................................... 25

Figure 31.

Filter block diagram................................................................ 26

Figure 32.

DSP block diagram ................................................................ 28

Figure 33.

Active power and energy calculation block diagram .......................................... 29

Figure 34.

Fundamental active power and energy calculation block diagram ................................ 30

Figure 35.

Reactive power and energy calculation block diagram ........................................ 30

Figure 36.

Apparent power and energy calculation block diagram........................................ 31

Figure 37.

Power sign status bit delay........................................................... 32

Figure 38.

RMS block ...................................................................... 33

Figure 39.

Zero-crossing generation ............................................................ 35

Figure 40.

Zero-crossing signal ............................................................... 35

Figure 41.

Phase meter .................................................................... 35

Figure 42.

Sag and swell detection blocks ........................................................ 37

Figure 43.

Sag detection process .............................................................. 38

Figure 44.

Swell detection process ............................................................. 39

Figure 45.

AH accumulation block ............................................................. 41

Figure 46.

AH accumulation thresholds .......................................................... 42

Figure 47.

Startup interface selection timing ...................................................... 45

Figure 48.

Single communication time frame ...................................................... 46

Figure 49.

Memory data organization ........................................................... 47

Figure 50.

Latching and reset through SYN pulses .................................................. 47

Figure 51.

Latching through SYN pulses ......................................................... 48

Figure 52.

UART frame ..................................................................... 50

Figure 53.

Phase shift error .................................................................. 58

STPM32, STPM33, STPM34

List of figures

DS10272 - Rev 13

page 87/89

STPM32 Datasheet(PDF) 87 Page - STMicroelectronics

STPM32 Datasheet(HTML) 87 Page - STMicroelectronics

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