STPM32 datasheet(25/89 Pages) STMICROELECTRONICS

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Figure 29. Global startup reset

SCS

SYN

VCC

t_startup

t_rpw

8.3

Functional description of the digital part

Each voltage and current channel has an independent digital signal processing chain, which is composed of:

•

Digital front end (DFE)

•

Phase compensation

•

Decimation

•

Filters

•

Calibration.

The outcoming signals are fed to a common hardwired DSP, which processes the metrology data.

Figure 30. DSP block functional description

SCLK

DCLK

Phase

Compensation

Calibration

Filters

DSP

DFE

Decimation

SCLK

DCLK

Phase

Compensation

Calibration

8.3.1

Digital front end (SDSx bits)

This block synchronizes and checks the sigma-delta bitstreams of voltage and current signals.

Each channel sigma-delta stream has an SDSx status bit associated, which is cleared if the stream is correct,

while it is set if the bitstream is stuck to 0 or 1 (this is the case of an input waveform saturating the dynamic input

of the sigma-delta modulator).

To set SDSx bit, sigma-delta (ƩΔ) stream should be stuck to 0 or 1 for a time between:

tƩΔstuck = 2 / (MCLK / 256) = 128 μs … tƩΔstuck = 3 / (MCLK / 256) = 192 μs.

Outputs are stored on bit number 20, 24 of DSP_SR1,2 and 13, 20 of DSP_EV1,2.

If SDSx = 1, the instantaneous values of voltage current are set on positive or negative maximum value,

according to sigma-delta stream. In this case active powers and energies are calculated with those values of

signals.

If sigma-delta stream of voltage channel is stuck, the reactive energy is zero.

8.3.2

Decimation block

The decimation block operates a serial decimation of three sigma-delta serial bitstreams coming from three

modulators of voltage, primary and secondary current channels.

STPM32, STPM33, STPM34

Functional description of the digital part

DS10272 - Rev 13

page 25/89

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