KM416RD8AS-RBM80 datasheet(46/64 Pages) SAMSUNG

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Page 43

KM416RD8AS

Direct RDRAM™

Rev. 0.9 July 1999

Target

Current and Temperature Control

Figure 51 shows an example of a transaction which performs

current control calibration. It is necessary to perform this

operation once to every RDRAM in every tCCTRL interval in

order to keep the IOL output current in its proper range.

This example uses four COLX packets with a CAL

command. These cause the RDRAM to drive four calibra-

tion packets Q(a0) a time tCAC later. An offset of tRDTOCC

must be placed between the Q(a0) packet and read data

Q(a1)from the same device. These calibration packets are

driven on the DQA4..3 and DQB4..3 wires. The TSQ bit of

the INIT register is driven on the DQA5 wire during same

interval as the calibration packets. The remaining DQA and

DQB wires are not used during these calibration packets.

The last COLX packet also contains a SAM command

(concatenated with the CAL command). The RDRAM

samples the last calibration packet and adjusts its IOL current

value.

Unlike REF commands, CAL and SAM commands cannot

be broadcast. This is because the calibration packets from

different devices would interfere. Therefore, a current

control transaction must be sent every tCCTRL/N, where N is

the number of RDRAMs on the Channel. The device field

Da of the address a0 in the CAL/SAM command should be

incremented after each transaction.

Figure 52 shows an example of a temperature calibration

sequence to the RDRAM. This sequence is broadcast once

every tTEMP interval to all the RDRAMs on the Channel.

The TCEN and TCAL are ROP commands, and cause the

slew rate of the output drivers to adjust for temperature drift.

During the quiet interval tTCQUIET the devices being cali-

brated can’t be read, but they can be written.

Figure 51: Current Control CAL/SAM Transaction Example

Figure 52: Temperature Calibration (TCEN-TCAL) Transactions to RDRAM

CTM/CFM

DQA7..0

DQB7..0

COL4

..COL0

ROW2

..ROW0

T12

T13

T10

T14

T11

T15 T16

T20

T24

T28

T17

T21

T25

T29

T18

T22

T26

T30

T19

T23

T27

T31 T32

T36

T40

T44

T33

T37

T41

T45

T34

T38

T42

T46

T35

T39

T43

T47

Transaction a0: CAL/SAM

a0 = {Da, Bx}

Transaction a1: RD

a1 = {Da, Bx}

CAL a0

CAL a2

Q (a0)

tCAC

CAL a0

CAL/SAM a0

CAL b0

DQA5 of the first calibrate packet has the inverted TSQ bit of INIT

control register; i.e. logic 0 or high voltage means hot temperature.

Q (a1)

tREADTOCC

a2 = {Da+1, Bx}

Transaction a2: CAL/SAM

Read data from the same

device from an earlier RD

command must be at this

packet position or earlier.

Read data from a different

device from an earlier RD

command can be anywhere

prior to the Q(a0) packet. .

Q (a1)

tCCSAMTOREAD

Read data from a different

device from a later RD

command can be anywhere

after to the Q(a0) packet.

Read data from the same device

from a later RD command must

be at this packet position or

later.

tCCTRL

When used for monitoring, it should be enabled with the DQA3

bit (current control one value) in case there is no RDRAM present:

HotTemp = DQA5•DQA3

CTM/CFM

DQA7..0

DQB7..0

COL4

..COL0

ROW2

..ROW0

T12

T13

T10

T14

T11

T15 T16

T20

T24

T28

T17

T21

T25

T29

T18

T22

T26

T30

T19

T23

T27

T31 T32

T36

T40

T44

T33

T37

T41

T45

T34

T38

T42

T46

T35

T39

T43

T47

tTCEN

TCEN

TCAL

TCEN

tTCAL

No read data from devices

tTCQUIET

being calibrated

tTEMP

Any ROW packet may be placed

in the gap between the ROW

packets with the TCEN and

TCAL commands.

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