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STA310 Datasheet(PDF) 50 Page - STMicroelectronics |
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STA310 Datasheet(HTML) 50 Page - STMicroelectronics |
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50 / 90 page ![]() STA310 50/90 This register is used to set the value of the status bit in the IEC958 data stream. SPDIF_REP_TIME SPDIF repetition time of a pause frame Address: 0x75 Type: R/W Software Reset: NC Hardware: Reset: UND Description: In compressed mode, a burst of pause frames is sent when there are no more data to transmit (due to an error or a gap in the incoming bitstream, for example). This register sets the size of a pause frame in IEC frames: Dolby Digital =4, MPEG=32 and DTS=3. SPDIF_LATENCY Latency value Address: 0x7E Type: R/W Software Reset: NC Hardware: Reset: UND Description: If bit LAT of register SPDIF_CONF is set, a delay can be configured between the output of IEC61937 in com- pressed mode and the output of the audio decoder. To configure a latency (in unit of seconds) this register has to be set according the following formula: Value = L x FS/8 where, L=Latency in s and FS=Sampling frequency in Hz Bitfield Description COM Compress data bit. 1: compressed mode 0: non compressed mode. COP 1: copy allowed 0: copy not allowed PRE 1: output has pre-emphasis 0: output does not have pre-emphasis SFR 0000: if sampling frequency = 44.1KHz 0010: if sampling frequency = 48KHz 0011: if sampling frequency = 32KHz 1010: if sampling frequency = 96KHz 76 54 321 0 76 54 321 0 Value |
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