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DM9102AT Datasheet(PDF) 70 Page - List of Unclassifed Manufacturers |
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DM9102AT Datasheet(HTML) 70 Page - List of Unclassifed Manufacturers |
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70 / 77 page ![]() DM9102A Single Chip Fast Ethernet NIC controller 70 Final Version: DM9102A-DS-F03 August 28, 2000 AC Electrical Characteristics & Timing Waveforms PCI Clock Specifications Timing tHIGH 2.0V 0.8V t R t F t LOW tCYCLE Symbol Parameter Min. Typ. Max. Unit Conditions tR PCI_CLK rising time - - 4 ns - tF PCI_CLK falling time - - 4 ns - tCYCLE Cycle time 25 30 - ns - tHIGH PCI_CLK High Time 12 - - ns - tLOW PCI_CLK Low Time 12 - - ns - Other PCI Signals Timing Diagram tOFF tH tSU Input tON Output c LK 2.5V tVAL (max) t VAL (min) Symbol Parameter Min. Typ. Max. Unit Conditions tVAL Clk-To-Signal Valid Delay 2 - 11 ns Cload = 50 pF tON Float-To-Active Delay From Clk 2 - - ns - tOFF Active-To-Float Delay From Clk - - 28 ns - tSU Input Signal Valid Setup Time Before Clk 7 - - ns - tH Input Signal Hold Time From Clk 0 - - ns - |
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