C5C5EDELTA-RMSLASHD datasheet(27/114 Pages) NXP

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C5C5EDELTA-RM/D Datasheet(PDF) 27 Page - NXP Semiconductors

Part #	C5C5EDELTA-RM/D

Description	C-3e Network Processor Silicon Revision A1

PDF	114 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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27 / 114 page

C3ENPA1-DS/D

Rev 03

Chapter 2

SIGNAL DESCRIPTIONS

Signal Summary

There are nine (9) functional groupings of signals in the C-3e Network Processor:

• Clock — 7 pins

• Channel Processors (CP0 - CP7) — 8x7 = 56 pins

• Executive Processor (XP) — 57 pins

– PCI Interface — 50 pins

– PROM Interface — 4 pins

– Serial Bus Interface — 2 pins

– General System Interface — 1 pin

• Fabric Processor (FP) — 42 pins

• Buffer Management Unit (BMU) — 160 pins

• Table Lookup Unit (TLU) — 99 pins

• Queue Management Unit (QMU) — 59 pins

• Power — 234 pins

• Test — 14 pins

Two (2) of the sections (CPs and FP) are configurable, depending on the type of device

being implemented.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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