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C5C5EDELTA-RM/D Datasheet(PDF) 84 Page - NXP Semiconductors |
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C5C5EDELTA-RM/D Datasheet(HTML) 84 Page - NXP Semiconductors |
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84 / 114 page  84 CHAPTER 3: ELECTRICAL SPECIFICATIONS C3EN Table 40 Gigabit GMII/MII Ethernet Interface Timing Description SYMBOL GIGABIT PARAMETER MIN TYP MAX UNIT COMMENT Tcgt Transmit Cycle Time, GMII 8.0 ns Tcgo Output Time, GMII 3.0 6.0 ns Tcgr Receive Cycle Time 8.0 ns Tcgs Setup Time 2.0 ns Tcgh Hold Time 0.0 ns Tcmt Transmit Cycle Time, MII 40/400 ns 100BaseT/10BaseT Tcmo Output Time, MII 2 12 ns Table 41 Gigabit TBI Interface Timing Description SYMBOL TBI PARAMETER MIN TYP MAX TOL UNIT Tctt Transmit Cycle Time 8.0 ns Tcto Output Time 3.0 6.0* * For Fibre Channel applications this value is 7.0ns for a transmit cycle time of 9.4ns. ns Tctr Receive Cycle Time 16.0 ns Tctd Rclk/Rclkn Deviation 1.0 ns Tcts Setup Time 2.0 ns Tcth Hold Time 0.0 ns Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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