PM0214 datasheet(62/245 Pages) STMICROELECTRONICS

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The STM32 Cortex-M4 instruction set

PM0214

62/245

DocID022708 Rev 4

When the instruction is LSRS or when LSR #n is used in operand2 with the instructions

MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag is updated

to the last bit shifted out, bit[n-1], of the register Rm.

Note:

If n is 32 or more, then all the bits in the result are cleared to 0.

If n is 33 or more and the carry flag is updated, it is updated to 0.

Figure 14. LSR#3

LSL

Logical shift left by n bits moves the right-hand 32-n bits of the register Rm, to the left by n

places, into the left-hand 32-n bits of the result. And it sets the right-hand n bits of the result

to 0 (see Figure 15: LSL#3 on page 62).

You can use the LSL #n operation to multiply the value in the register Rm by 2n, if the value

is regarded as an unsigned integer or a two’s complement signed integer. Overflow can

occur without warning.

When the instruction is LSLS or when LSL #n, with non-zero n, is used in operand2 with the

instructions MOVS, MVNS, ANDS, ORRS, ORNS, EORS, BICS, TEQ or TST, the carry flag

is updated to the last bit shifted out, bit[32-n], of the register Rm. These instructions do not

affect the carry flag when used with LSL #0.

Note:

If n is 32 or more, then all the bits in the result are cleared to 0.

If n is 33 or more and the carry flag is updated, it is updated to 0.

Figure 15. LSL#3

PM0214 Datasheet(PDF) 62 Page - STMicroelectronics