PM0214 datasheet(110/245 Pages) STMICROELECTRONICS

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The STM32 Cortex-M4 instruction set

PM0214

110/245

DocID022708 Rev 4

3.6.2

UMULL, UMAAL and UMLAL

Unsigned long multiply, with optional accumulate, 32-bit operands, producing a 64-bit result.

Syntax

op{cond} RdLo, RdHi, Rn, Rm

where:

•

‘op’ is one of:

UMULL: Unsigned long multiply

UMAAL: Unsigned long multiply, with accumulate accumulate

UMLAL: Unsigned long multiply, with accumulate

•

‘cond’ is an optional condition code (see Conditional execution on page 64)

•

‘RdHi, RdLo’ are the destination registers. They also hold the accumulating value.

•

‘Rn, Rm’ are registers holding the first and second operands

Operation

The UMULL instruction:

Multiplies the two unsigned integers in the first and second operands.

Writes the least significant 32 bits of the result in RdLo.

Writes the most significant 32 bits of the result in RdHi.

The UMAAL instruction:

Multiplies the two unsigned 32-bit integers in the first and second operands.

Adds the unsigned 32-bit integer in RdHi to the 64-bit result of the multiplication.

Adds the unsigned 32-bit integer in RdLo to the 64-bit result of the addition.

Writes the top 32-bits of the result to RdHi.

Writes the lower 32-bits of the result to RdLo.

The UMLAL instruction:

Multiplies the two unsigned integers in the first and second operands.

Adds the 64-bit result to the 64-bit unsigned integer contained in RdHi and RdLo.

Writes the result back to RdHi and RdLo.

Restrictions

In these instructions:

•

Do not use either SP or PC

•

RdHi and RdLo must be different registers

Condition flags

These instructions do not affect the condition code flags.

Examples

UMULL

R0, R4, R5, R6

; Multiplies R5 and R6, writes the top 32 bits to R4

; and the bottom 32 bits to R0

UMAAL

R3, R6, R2, R7

; Multiplies R2 and R7, adds R6, adds R3, writes the

; top 32 bits to R6, and the bottom 32 bits to R3

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