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PM0214 Datasheet(PDF) 142 Page - STMicroelectronics |
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PM0214 Datasheet(HTML) 142 Page - STMicroelectronics |
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142 / 245 page  The STM32 Cortex-M4 instruction set PM0214 142/245 DocID022708 Rev 4 Restrictions The restrictions are: • Do not use PC in the BLX instruction • For BX and BLX, bit[0] of Rm must be 1 for correct execution but a branch occurs to the target address created by changing bit[0] to 0 • When any of these instructions is inside an IT block, it must be the last instruction of the IT block. Bcond is the only conditional instruction that is not required to be inside an IT block. However, it has a longer branch range when it is inside an IT block. Condition flags These instructions do not change the flags. Examples B loopA ; Branch to loopA BLE ng ; Conditionally branch to label ng B.W target ; Branch to target within 16MB range BEQ target ; Conditionally branch to target BEQ.W target ; Conditionally branch to target within 1MB BL funC ; Branch with link (Call) to function funC, return address ; stored in LR BX LR ; Return from function call BXNE R0 ; Conditionally branch to address stored in R0 BLX R0 ; Branch with link and exchange (Call) to a address stored ; in R0 |
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