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C5C5EDELTA-RM/D Datasheet(PDF) 21 Page - NXP Semiconductors |
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C5C5EDELTA-RM/D Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 114 page  Block Diagram 21 03 Figure 1 C-5e Network Processor Block Diagram PHY PHY PHY PHY PHY PHY PHY PHY Buses (68Gbps Bandwidth) Cluster Cluster CP-1 CP-0 CP-2 CP-3 CP-12 CP-13 CP-14 CP-15 External Host CPU (optional) OC-3 PHY Interface Examples: OC-12 Gigabit Ethernet - Aggregated 10/100 Ethernet External PROM (optional) Control Logic (optional) Fabric Processor Boundary Buffer Mgmt Unit Channel Processors SDRAM C-5e NP SRAM SRAM Table Lookup Unit Fabric Processor Executive Processor Queue Mgmt Unit PCI Serial PROM 1xOC-48c or 48x STS-1 with M-5 Companion Device Q-5 (optional) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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