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C5C5EDELTA-RM/D Datasheet(PDF) 95 Page - NXP Semiconductors |
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C5C5EDELTA-RM/D Datasheet(HTML) 95 Page - NXP Semiconductors |
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95 / 114 page ![]() AC Timing Specifications 95 03 Table 52 Fabric Processor Timing Description SYMBOL PARAMETER MIN TYP MAX UNIT COMMENT Tfrc FRX Cycle Time 8.0 ns Tfrcs FRXCTL Setup 4.0 1.5 ns Utopia2 Mode All other modes Tfrch FRXCTL Hold 0.0 ns Tfrco FRXCTL Output 1.0 4.0 ns Tfrcz FRXCTL Clk to Tri* * Not fully tested, values based on design/characterization. 1.0 4.0 ns Tfrcv FRXCTL Clk to Driven* 1.0 4.0 ns Tfrds FIN Setup 4.0 1.5 ns Utopia2 Mode All other modes Tfrdh FIN Hold 0.0 ns Tftc FTX Cycle Time 8.0 ns Tftcs FTXCTL Setup 4.0 1.5 ns Utopia2 Mode All other modes Tftch FTXCTL Hold 0.0 ns Tftco FTXCTL Output 1.0 4.0 ns Tftcz FTXCTL Clk to Tri* 1.0 4.0 ns Tftcv FTXCTL Tri to Driven* 1.0 4.0 ns Tftdo FOUT Output 1.0 4.0 ns Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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