C5C5EDELTA-RMSLASHD datasheet(39/114 Pages) NXP

39 / 114 page

Pin Descriptions Grouped by Function

SONET OC-3 Transceiver Interface Configuration

Table 13 describes the SONET Optical Carrier (OC) 3 transceiver interface signals. For each

CP (0-15), you can implement a single OC-3 interface.

CPn+3_0

Table 7 1

CPn+3_1

Table 7 1

LVTTL

RCLKN

Receive Clock Inverted

CPn+3_2

Table 7 1

LVTTL

RXD(5)

Receive Data

CPn+3_3

Table 7 1

LVTTL

RXD(4)

Receive Data

CPn+3_4

Table 7 1

LVTTL

RXD(3)

Receive Data

CPn+3_5

Table 7 1

LVTTL

RXD(2)

Receive Data

CPn+3_6

Table 7 1

LVTTL

RXD(0)

Receive Data (ten bits wide, first on wire)

TOTAL PINS

* n can be 0, 4, 8, or 12

† Reference Table 7 for pin numbers for the actual cluster(s) you are configuring.

Table 12 Gigabit Ethernet and Fibre Channel TBI Signals Example (continued)

SIGNAL NAME*

PIN #†

TOTAL

TYPE

I/O

LABEL

SIGNAL DESCRIPTION

Table 13 OC-3 Signals

SIGNAL NAME*

PIN #†

TOTAL

TYPE

I/O

LABEL

SIGNAL DESCRIPTION

CPn_0

Table 7

LVPECL

RCLK_H

Receive Clock noninverted side of pair (155.52MHz)

CPn_1

Table 7

LVPECL

RCLK_L

Receive Clock inverted side of pair (155.52MHz)

CPn_2

Table 7

LVPECL

TXD_H

Transmit Data noninverted side of pair

CPn_3

Table 7

LVPECL

TXD_L

Transmit Data inverted side of pair

CPn_4

Table 7

LVPECL

RXD_H

Receive Data noninverted side of pair

CPn_5

Table 7

LVPECL

RXD_L

Receive Data inverted side of pair

CPn_6

Table 7

LVPECL

SIGNAL_DET

A light level above a certain threshold is present at the optical

receiver - single ended LVPECL.

TOTAL PINS

* n can be from 0 to 15.

† Reference Table 7 for pin numbers for the actual cluster(s) you are configuring.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

C5C5EDELTA-RM/D Datasheet(PDF) 39 Page - NXP Semiconductors

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