TJA1080ATSSLASH2SLASHT datasheet(24/49 Pages) NXP

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TJA1080A

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Product data sheet

Rev. 5 — 24 February 2011

24 of 49

NXP Semiconductors

TJA1080A

FlexRay transceiver

6.7.7 Temperature high flag

The temperature high flag is set if the junction temperature exceeds Tj(dis)(high) in a normal

power mode while pin VBAT is within its operating range.

In node configuration the temperature high flag is reset if a negative edge is applied to pin

TXEN while the junction temperature is lower than Tj(dis)(high) in a normal power mode with

pin VBAT within its operating range. In star configuration, the temperature high flag is reset

by any activity detection (edge) while the junction temperature is lower than Tj(dis)(high) in a

normal power mode while pin VBAT is within its operating range.

If the temperature high flag is set the transmitter is disabled and pins TRXD0 and TRXD1

are switched off.

6.7.8 TXEN_BGE clamped flag

The TXEN_BGE clamped flag is set if pin TXEN is LOW and pin BGE is HIGH for longer

than tdetCL(TXEN_BGE). The TXEN_BGE clamped flag is reset if pin TXEN is HIGH or pin

BGE is LOW. If the TXEN_BGE flag is set, the transmitter is disabled.

6.7.9 Bus error flag

The bus error flag is set if pin TXEN is LOW and pin BGE is HIGH and the data received

from the bus lines (pins BP and BM) is different to that received on pin TXD. Additionally

in star configuration the bus error flag is also set if the data received on the bus lines is

different to that received on pins TRXD0 and TRXD1. The transmission of any valid

communication element, including a wake-up pattern, does not lead to bus error

indication.

The error flag is reset if the data on the bus lines (pins BP and BM) is the same as on pin

TXD or if the transmitter is disabled. No action will be taken if the bus error flag is set.

6.7.10 UVVBAT flag

The UVVBAT flag is set if the voltage on pin VBAT is lower than Vuvd(VBAT). The UVVBAT flag

is reset if the voltage is higher than Vuvd(VBAT) or by setting the wake flag; see

Section 6.6.1.

6.7.11 UVVCC flag

The UVVCC flag is set if the voltage on pin VCC is lower than Vuvd(VCC) for longer than

tdet(uv)(VCC). The flag is reset if the voltage on pin VCC is higher than Vuvd(VCC) for longer

than trec(uv)(VCC) or the wake flag is set; see Section 6.6.2.

6.7.12 UVVIO flag

The UVVIO flag is set if the voltage on pin VIO is lower than Vuvd(VIO) for longer than

tdet(uv)(VIO). The flag is reset if the voltage on pin VIO is higher than Vuvd(VIO) or the wake

flag is set; see Section 6.6.3.

6.7.13 Error flag

The error flag is set if one of the status bits S4 to S12 is set. The error flag is reset if none

of the S4 to S12 status bits are set; see Table 10.

TJA1080ATS/2/T Datasheet(PDF) 24 Page - NXP Semiconductors

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