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V62/12615-01XE-R Datasheet(PDF) 59 Page - Texas Instruments |
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V62/12615-01XE-R Datasheet(HTML) 59 Page - Texas Instruments |
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59 / 92 page ![]() X1 X2 C L2 C L1 R 1 DP83848-EP www.ti.com SLLSEC6D – SEPTEMBER 2012 – REVISED JUNE 2013 7.3.2 Crystal A 25 MHz, parallel, 20 pF load crystal resonator should be used if a crystal source is desired. Figure 7-2 shows a typical connection for a crystal resonator circuit. The load capacitor values will vary with the crystal vendors; check with the vendor for the recommended loads. The oscillator circuit is designed to drive a parallel resonance at cut crystal with a minimum drive level of 100 μW and a maximum of 500 μW. If a crystal is specified for a lower drive level, a current limiting resistor should be placed in series between X2 and the crystal. As a starting point for evaluating an oscillator circuit, if the requirements for the crystal are not known, CL1 and CL2 should be set at 33 pF, and R1 should be set at 0 Ω. Specification for 25 MHz crystal are listed in Table 7-3. Figure 7-2. Crystal Oscillator Circuit Table 7-1. 25 MHz Oscillator Specification PARAMETER MIN TYP MAX UNIT CONDITION Frequency 25 MHz Frequency tolerance ±50 ppm Operational temperature Frequency stability ±50 ppm 1 year aging Rise/Fall time 6 ns 20% - 80% Jitter 800(1) ps Short term Jitter 800(1) ps Long term Symmetry 40% 60% Duty cycle (1) This limit is provided as a guideline for component selection and to guaranteed by production testing. Refer to AN-1548, “PHYTER 100 Base-TX Reference Clock Jitter Tolerance,“ for details on jitter performance. Table 7-2. 50 MHz Oscillator Specification PARAMETER MIN TYP MAX UNIT CONDITION Frequency 50 MHz Frequency tolerance ±50 ppm Operational temperature Frequency stability ±50 ppm Operational temperature Rise/Fall time 6 ns 20% - 80% Jitter 800(1) ps Short term Jitter 800(1) ps Long term Symmetry 40% 60% Duty cycle (1) This limit is provided as a guideline for component selection and to guaranteed by production testing. Refer to AN-1548, “PHYTER 100 Base-TX Reference Clock Jitter Tolerance,“ for details on jitter performance. Copyright © 2012–2013, Texas Instruments Incorporated DESIGN GUIDELINES 59 Submit Documentation Feedback Product Folder Links: DP83848-EP |
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