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AT697F Datasheet(PDF) 81 Page - ATMEL Corporation |
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AT697F Datasheet(HTML) 81 Page - ATMEL Corporation |
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81 / 176 page  81 AT697F 7703E–AERO–08/11 To prevent erroneous operations from single event upset (SEU) errors and single event upset (SEU), the AT697F is based on full triple modular redundancy (TMR) architecture. Figure 50. TMR structure Such architecture is based on a fully triplicated clock distribution (CLK1, CLK2 and CLK3). In that way, each one of the PCI clock and the cpu clock are build as three-clock trees. Skew To prevent the processor from corruption by SET errors (Single Event Transient), skew can be programmed on the clock trees. The two dedicated pins SKEW[1:0] are used to control the skew on the clock trees. Here is a short description of the skew implementation: Figure 51. CPU clock tree overview D1 D2 D3 D4 SKEW[1:0] SKEW[1:0] SKEW[1:0] CLK1 tree CLK2 tree CLK3 tree BYPASS CLK PLL cpu clock D2 = D1 D4 = D3 = 2 * D1 01 10 00 01 10 00 01 10 00 |
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