AT697F_14 datasheet(46/176 Pages) ATMEL

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AT697F

7703E–AERO–08/11

Bus Exception

A PROM, SRAM or I/O read/write access error can be signalled to the processor by

asserting the BEXC* signal which is sampled together with the read/written data, if

enabled in the memory controller (MCFG1.bexc = 1):

•an instruction_access_exception trap (0x01) is generated if an instruction

fetch is in progress

•a data_access_exception trap (0x09) is generated if a data load is in progress

•a write_error trap (0x2B) is generated if a data store is in progress

EDAC Management

Overview

The AT697F implements on-chip error detection and correction (EDAC). It can correct

any single-bit error and detect double-bit errors in a 32-bit word.

EDAC Capability Mapping

EDAC is available on PROM, SRAM and SDRAM memory areas.

Table 13. External Memory EDAC Capability

0x00000000 - 0x1FFFFFFF

PROM

8 bits

yes

32 bits

yes

0x20000000 - 0x3FFFFFFF

I/O

All

0x40000000 - 0x7FFFFFFF

SRAM

8 bits

yes

32 bits

yes

SDRAM

32 bits

yes

PROM Protection

When EDAC is activated on the PROM area(1) (MCFG3.pe = 1), error detection and cor-

rection is performed on every instruction fetch and data load in that area.

Note:

1. Upon reset, EDAC on the PROM area is automatically configured from the value read

on the PIO[2] pin. By driving PIO[2] high during reset, it is possible to enable

EDAC on PROM on boot.

RAM Protection

When EDAC is activated on the RAM area(1)(2) (MCFG3.re = 1), error detection and cor-

rection is performed on every instruction fetch and data load in that area.

Notes: 1. When EDAC is enabled on the RAM area, read-modify-write on the SRAM

(MCFG2.ramrmw) shall be enabled as well so the integrity of the EDAC checkbits is

preserved on sub-word writes.

2. Activating EDAC on the RAM area automatically enables read-modify-write on sub-

word writes to the SDRAM.

Caution: The RAM area shall always be initialized with 32-bit word writes prior to EDAC activation

so further sub-word writes (performed as 32-bit read-modify-write atomic operations)

always successfully pass the initial read & check step (see "Read Access").

Operation

When enabled, the EDAC operates on every access to the external memory.

Hamming Code

For each word, a 7-bit checksum is generated according to the following equations:

CB0 = D0 ^ D4 ^ D6 ^ D7 ^ D8 ^ D9 ^ D11 ^ D14 ^ D17 ^ D18 ^ D19 ^ D21 ^ D26 ^ D28 ^ D29 ^ D31

CB1 = D0 ^ D1 ^ D2 ^ D4 ^ D6 ^ D8 ^ D10 ^ D12 ^ D16 ^ D17 ^ D18 ^ D20 ^ D22 ^ D24 ^ D26 ^ D28

CB2 = D0 ^ D3 ^ D4 ^ D7 ^ D9 ^ D10 ^ D13 ^ D15 ^ D16 ^ D19 ^ D20 ^ D23 ^ D25 ^ D26 ^ D29 ^ D31

CB3 = D0 ^ D1 ^ D5 ^ D6 ^ D7 ^ D11 ^ D12 ^ D13 ^ D16 ^ D17 ^ D21 ^ D22 ^ D23 ^ D27 ^ D28 ^ D29

CB4 = D2 ^ D3 ^ D4 ^ D5 ^ D6 ^ D7 ^ D14 ^ D15 ^ D18 ^ D19 ^ D20 ^ D21 ^ D22 ^ D23 ^ D30 ^ D31

CB5 = D8 ^ D9 ^ D10 ^ D11 ^ D12 ^ D13 ^ D14 ^ D15 ^ D24 ^ D25 ^ D26 ^ D27 ^ D28 ^ D29 ^ D30 ^ D31

Address Range

Area

EDAC Protected

AT697F Datasheet(PDF) 46 Page - ATMEL Corporation

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