AT697F_14 datasheet(23/176 Pages) ATMEL

23 / 176 page

AT697F

7703E–AERO–08/11

or hardware error in the FPU. The type of floating-point exception is encoded in the

FPU state register (FSR.ftt).

•

data_access_exception - A blocking error exception occurred on a load/store

data access. EDAC uncorrectable error.

•

tag_overflow - A tagged arithmetic instruction was executed, and either

arithmetic overflow occurred or at least one of the tag bits of the operands was non

zero.

•

trap_division_by_zero - An integer divide instruction attempted to divide by

zero.

•

trap_instruction - A software instruction (Ticc) was executed and the trap

condition evaluated to true.

When multiple synchronous traps occur at the same cycle (i.e hardware errors), the

highest priority trap is taken and lower priority traps are ignored.

Asynchronous Traps /

Interrupts

The AT697F handles up to 15 interrupts. The interrupt controller is used to prioritize and

propagate interrupts requests from internal peripherals and external devices to the IU.

Figure 5. Interrupt Controller Block Diagram

Interrupt Pending Reg.

ITP

Interrupt Force Reg.

ITF

Interrupt Mask & Priority Reg.

ITMP

Interrupt Clear Reg.

ITC

I/O Interrupt Reg.

IOIT

priority

mask

trap1x generation

PIO[15:0]

Internal Interrupt

(Timer1, Uart1,...)

Interrupt Sources

Operation

Interrupts are controlled in the interrupt mask and priority register (ITMP):

•

interrupts requests can be masked (ITMP.imask) so they will not trigger an

interrupt

•

interrupt requests can have a low/high priority level (ITMP.ilevel)

When an interrupt request is generated, the corresponding bit is set in the interrupt

pe nd ing r egist er ( ITP. ipend [] ) on ly if th e inte rru pt is not m a sk ed

(ITMP.imask[] = 0).

Then all pending interrupts are forwarded to the priority selector. The pending interrupt

( ITP. ipend [] ) with th e high est n u m b e r on th e hig h prio rity leve l

(ITMP.ilevel[] = 1) is selected and forwarded to the IU. If no pending interrupt exists

with a high priority level, the pending interrupt with the highest number on the low priority

level (ITMP.ilevel[] = 0) is selected and forwarded to the IU.

Interrupts can also be forced by setting the corresponding bit in the interrupt force regis-

ter (ITF.iforce[] = 1). Forcing is effective only if the corresponding interrupt is not

masked (ITMP.imask[] = 0). A forced interrupt never shows up as pending.

AT697F Datasheet(PDF) 23 Page - ATMEL Corporation

AT697F Datasheet(HTML) 23 Page - ATMEL Corporation

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