V62SLASH13624-01XE-R datasheet(24/77 Pages) TI1

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MSP430F2132-EP

SLAS913A – JULY 2013 – REVISED AUGUST 2013

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(1)

The maximum total current, IOH(max) and IOL(max), for all outputs combined, should not exceed ±12 mA to hold the maximum voltage drop

specified.

(2)

The maximum total current, IOH(max) and IOL(max), for all outputs combined, should not exceed ±48 mA to hold the maximum voltage drop

specified.

5.9 Outputs (Ports P1, P2, P3)

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

VCC

MIN

MAX

UNIT

VOH

High-level output voltage

IOH(max) = -1.5 mA

(1)

2.2 V

VCC - 0.3

VCC

IOH(max) = -6 mA

(2)

VCC - 0.65

VCC

IOH(max) = -1.5 mA

(1)

3 V

VCC - 0.3

VCC

IOH(max) = -6 mA

(2)

VCC - 0.65

VCC

VOL

Low-level output voltage

IOL(max) = 1.5 mA

(1)

2.2 V

VSS

VSS + 0.3

IOL(max) = 6 mA

(2)

VSS

VSS + 0.65

IOL(max) = 1.5 mA

(1)

3 V

VSS

VSS + 0.3

IOL(max) = 6 mA

(2)

VSS

VSS + 0.65

(1)

Not ensured for TA > 105°C.

(2)

Alternatively, a resistive divider with two 0.5-kΩ resistors between VCC and VSS is used as load. The output is connected to the center

tap of the divider.

(3)

The output voltage reaches at least 10% and 90% VCC at the specified toggle frequency.

5.10 Output Frequency (Ports P1, P2, P3)

(1)

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted). See Typical

Characteristics - Outputs for related characterization graphs.

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

fPx.y

Port output frequency (with load)

P1.4/SMCLK, CL = 20 pF, RL = 1 kΩ

(2) (3)

2.2 V

7.5

MHz

3 V

fPort°CLK

Clock output frequency

P2.0/ACLK, P1.4/SMCLK, CL = 20 pF

(3)

2.2 V

7.5

MHz

3 V

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