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V62/13624-01XE-R Datasheet(PDF) 52 Page - Texas Instruments |
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V62/13624-01XE-R Datasheet(HTML) 52 Page - Texas Instruments |
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52 / 77 page ![]() Direction 0: Input 1: Output P1SEL.0 P1DIR.0 P1IN.0 P1IRQ.0 D EN Module X IN ADC10CLK P1OUT.0 Interrupt Edge Select Q EN Set P1SEL.0 P1IES.0 P1IFG.x P1IE.x DVSS DVCC P1REN.0 Pad Logic 1 1 0 0 1 1 0 P1.0/TACLK/ ADC10CLK/CAOUT 1 0 From Comparator P1SEL2.0 Bus Keeper EN 52 MSP430F2132-EP SLAS913A – JULY 2013 – REVISED AUGUST 2013 www.ti.com Product Folder Links: MSP430F2132-EP Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated 6 Application Information 6.1 Port P1 Pin Schematic: P1.0, Input/Output With Schmitt Trigger Table 16. Port P1 (P1.0) Pin Functions PIN NAME (P1.x) x FUNCTION CONTROL BITS AND SIGNALS P1DIR.x P1SEL.x P1SEL2.x P1.0/TACLK/ ADC10CLK/CAOUT 0 P1.0 (I/O) I: 0, O: 1 0 0 Timer0_A3.TACLK, Timer1_A2.TACLK 0 1 0 ADC10CLK 1 1 0 CAOUT 1 1 1 |
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