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TNETV2501INPGF Datasheet(PDF) 18 Page - Texas Instruments |
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TNETV2501INPGF Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 197 page  Introduction 18 December 2002 − Revised November 2008 SPRS206K Table 2−2. 201-Terminal GZZ and ZZZ Ball Grid Array Ball Assignments†‡ BALL NO. SIGNAL NAME BALL NO. SIGNAL NAME BALL NO. SIGNAL NAME BALL NO. SIGNAL NAME B1 GPIO6 U2 HCNTL1 T17 A19 A16 D16 C2 GPIO4 T3 HCNTL0 R16 A18 B15 D15 C1 GPIO2 U3 VSS R17 VSS A15 D14 D3 GPIO1 R4 HR/W P15 A17 C14 D13 D2 GPIO0 T4 HDS2 P16 A16 B14 D12 D1 TIM1 U4 CVDD P17 DVDD A14 D11 E3 TIM0 R5 HDS1 N15 A15 C13 D10 E2 INT0 T5 HRDY N16 A14 B13 D9 E1 CVDD U5 DVDD N17 VSS A13 DVDD F3 INT1 R6 CLKOUT M15 A13 C12 D8 F2 INT2 T6 XF M16 A12 B12 D7 F1 DVDD U6 VSS M17 CVDD A12 VSS G4 INT3 P7 C15 L14 A11 D11 D6 G3 NMI/WDTOUT R7 C14 L15 A10 C11 D5 G2 IACK T7 HINT L16 A9 B11 D4 G1 VSS U7 PVDD L17 A8 A11 CVDD H1 CLKR0 U8 NC K17 DVDD A10 D3 H4 DR0 P8 X1 K14 A7 D10 D2 H3 FSR0 R8 X2/CLKIN K15 A6 C10 D1 H2 CLKX0 T8 EMIFCLKS K16 A5 B10 D0 J1 CVDD U9 VSS J17 VSS A9 VSS J4 DX0 P9 C13 J14 A4 D9 EMU1/OFF J3 FSX0 R9 C12 J15 A3 C9 EMU0 J2 CLKR1 T9 C11 J16 A2 B9 TDO K1 DR1 U10 C10 H17 CVDD A8 VSS K2 FSR1 T10 C9 H16 D31 B8 TDI K4 DX1 P10 C8 H14 D30 D8 TRST K3 CLKX1 R10 C7 H15 D29 C8 TCK L1 VSS U11 VSS G17 VSS A7 TMS L2 FSX1 T11 ECLKIN G16 D28 B7 RESET L3 TEST§ R11 ECLKOUT2 G15 D27 C7 HPIENA L4 NC P11 ECLKOUT1 G14 D26 D7 HD7 M1 CVDD U12 CVDD F17 CVDD A6 CVDD M2 RX T12 C6 F16 D25 B6 HD6 M3 GPIO5 R12 C5 F15 D24 C6 HD5 N1 DVDD U13 DVDD E17 DVDD A5 DVDD N2 TX T13 C4 E16 D23 B5 HD4 N3 GPIO3 R13 C3 E15 D22 C5 HD3 P1 VSS U14 VSS D17 D21 A4 CVDD P2 SCL T14 C2 D16 D20 B4 HD2 P3 SDA R14 C1 D15 D19 C4 HD1 R1 HC1 U15 C0 C17 VSS A3 VSS R2 HC0 T15 A21 C16 D18 B3 HD0 T1 HCS U16 A20 B17 D17 A2 GPIO7¶ † CVDD is core VDD, DVDD is I/O VDD, and PVDD is PLL VDD. ‡ NC indicates “no connect”. § The TEST pin is reserved for internal testing. It should be left unconnected. ¶ The GPIO7 pin must be low at the rising edge of the reset signal for the device to operate properly. |
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