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TNETV2501INPGF Datasheet(PDF) 88 Page - Texas Instruments |
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TNETV2501INPGF Datasheet(HTML) 88 Page - Texas Instruments |
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88 / 197 page ![]() Functional Overview 88 December 2002 − Revised November 2008 SPRS206K 3.10.7.3 Peripheral IDLE Control Register (PICR) 15 14 13 12 11 10 9 8 Reserved MISC EMIF BIOST WDT PIO URT R, 00 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 7 65 4 3 2 1 0 I2C ID IO Reserved SP1 SP0 TIM1 TIM0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 LEGEND: R = Read, W = Write, n = value at reset Figure 3−28. Peripheral IDLE Control Register Layout (0x9400) Table 3−29. Peripheral IDLE Control Register Bit Field Description BIT NAME BIT NO. ACCESS RESET VALUE DESCRIPTION Reserved 15−14 R 00 Reserved MISC 13† R/W 0 MISC bit MISC = 0: Miscellaneous modules remain active when ISTR.PERIS = 1 and IDLE instruction is executed. MISC = 1: MIscellaneous module is disabled when ISTR.PERIS = 1 and IDLE instruction is executed. Miscellaneous modules include the XBSR, TIMEOUT Error Register, XBCR, Timer Signal Selection Register, CLKOUT Select Register, and Clock Mode Control Register. EMIF 12† R/W 0 EMIF bit EMIF = 0: EMIF module remains active when ISTR.PERIS = 1 and IDLE instruction is executed. EMIF = 1: EMIF module is disabled when ISTR.PERIS = 1 and IDLE instruction is executed. BIOST 11† R/W 0 BIOS timer bit BIOST = 0: DSP/BIOS timer remains active when ISTR.PERIS = 1 and the IDLE instruction is executed. BIOST = 1: DSP/BIOS timer is disabled when ISTR.PERIS = 1 and the IDLE instruction is executed. WDT 10† R/W 0 Watchdog timer bit WDT = 0: WDT remains active when ISTR.PERIS = 1 and the IDLE instruction is executed. WDT = 1: WDT is disabled when ISTR.PERIS = 1 and the IDLE instruction is executed. PIO 9† R/W 0 Parallel GPIO bit PIO = 0: Parallel GPIO remains active when ISTR.PERIS = 1 (ISTR.[3]) and the IDLE instruction is executed. PIO = 1: Parallel GPIO is disabled when ISTR.PERIS = 1 and the IDLE instruction is executed. † If the peripheral is already in IDLE, setting PERI (bit 3 of ICR) to 0 and executing the IDLE instruction will wake up all peripherals, and PICR bit settings will be ignored. If PERIS (bit 3 of ISTR) = 1, executing the IDLE instruction will wake up the peripheral if its PICR bit is 0. |
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