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TNETV2501INPGF Datasheet(PDF) 77 Page - Texas Instruments

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Part # TNETV2501INPGF
Description  Fixed-Point Digital Signal Processor
PDF  197 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV2501INPGF Datasheet(HTML) 77 Page - Texas Instruments

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Functional Overview
77
December 2002 − Revised November 2008
SPRS206K
3.10 Idle Control
The Idle function is implemented for low power consumption. The Idle function achieves low power
consumption by gating the clock to unused parts of the chip, and/or setting the clock generator (PLL) and the
internal oscillator to a power-down mode.
3.10.1
Clock Domains
The 5501 provides six clock domains to power-off the main clock to the portions of the device that are not being
used. The six domains are:
CPU Domain
Master Port Domain (includes DMA and HPI modules)
ICACHE
Peripherals Domain
Clock Generator Domain
EMIF Domain
3.10.2
IDLE Procedures
Before entering idle mode (executing the IDLE instruction), the user has first to determine which part of the
system needs to be disabled and then program the Idle Control Register (ICR) accordingly. When the IDLE
instruction is executed, the ICR will be copied into the Idle Status Register (ISTR). The different bits of the ISTR
register will be propagated to disable the chosen domains. Special care has to be taken in programming the
ICR as some IDLE domain combinations are not valid (for example: CPU on and clock generator off).
3.10.2.1 CPU Domain Idle Procedure
The 5501 CPU can be idled by executing the following procedure.
1.
Write ‘1’ to the CPUI bit (bit 0 of ICR).
2.
Execute the IDLE instruction.
3.
CPU will go to idle state
3.10.2.2 Master Port Domain (DMA/HPI) Idle Procedure
The clock to the DMA module and/or the HPI module will be stopped when the DMA and/or the HPI bit in the
MICR is set to 1 and the MPIS bit in the ISTR becomes 1. The DMA will go into idle immediately if there is no
data transfer taking place. If there is a data transfer taking place, then it will finish the current transfer and then
go into idle. The HPI will go into idle regardless of whether or not there is a data transfer taking place. Software
must confirm that the HPI has no activity before setting it to idle.
The 5501 DMA module and the HPI module can be disabled by executing the following procedure.
1.
Write ‘1’ to the DMA bit and/or the HPI bit in MICR.
2.
Write ‘1’ to the MPI bit in ICR.
3.
Execute the IDLE instruction.
4.
DMA and/or HPI go/goes to idle.



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