ADDR10 datasheet(52/68 Pages) ETC2

Part #	ADDR10

Description	Figure 1 shows the NS7520 modules. Dashed lines indicate shared pins

PDF	68 Pages

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Manufacturer	ETC2 [List of Unclassifed Manufacturers]

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FP D R AM timing

NS 93 60 Da ta shee t

03 /2 00 6

FP DRAM timing

BCLK max frequency: 55.296 MHz

Operating conditions:

FP DRAM timing parameters

Temperature:

-15.00 (min)

110.00 (max)

Voltage:

1.60 (min)

1.40 (max)

Output load:

25.0pf

Input drive:

CMOS buffer

Num

Description

Min

Max

Unit

BCLK high to BE* valid

15.5

BCLK high to address valid

13.5

BCLK high to data out valid

BCLK high to data out high impedance

Data in valid to BCLK high (setup)

BCLK high to data in invalid (hold)

TA* valid to BCLK high (setup)

BCLK high to TA* invalid (hold)

BCLK low to OE* valid

12.5

BCLK low to WE* valid

BCLK high to TA* valid

13.5

BCLK high to TEA* valid

BCLK high to PORTA2/AMUX valid

BCLK high to muxed address valid

14.5

BCLK low to CAS* valid

BCLK low to RAS* valid

BCLK high to RW* valid

13.5

ADDR10 Datasheet(PDF) 52 Page - List of Unclassifed Manufacturers

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