ADDR10 datasheet(63/68 Pages) ETC2

Part #	ADDR10

Description	Figure 1 shows the NS7520 modules. Dashed lines indicate shared pins

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Manufacturer	ETC2 [List of Unclassifed Manufacturers]

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Ex te rna l DM A tim i ng

ww w.d i gi .c om

External DMA timing

BCLK max frequency: 55.296 MHz

Operating conditions:

External DMA timing parameters

Fly-by external DMA

Notes:

The memory signals are data[31:0], addr[27:0], BE[3:0], CS/RAS[4:0], CAS[3:0], RW, OE*. WE*,

and PORTC3/AMUX. The timing of these signals depends on how the memory is configured

(Sync SRAM, Async SRAM, FP DRAM, or SDRAM).

The DONE* signal works as an input only when the DMA channel is configured as fly-by write.

Temperature:

-15.00 (min)

110.00 (max)

Voltage:

1.60 (min)

1.40 (max)

Output load:

25.0pf

Input drive:

CMOS buffer

Num

Description

Min

Max

Unit

BCLK high to DACK* valid

BCLK high to DONE* (output) valid

DREQ* low to BCLK high (setup)

BCLK high to DREQ* valid (hold)

DONE* (input) valid BCLK high (setup)

BLCK high to DONE* (input) valid (hold)

Note2

BCLK

Mem signals (Note-1)

DREQ*

DACK*

DONE* (output)

DONE* (input)

ADDR10 Datasheet(PDF) 63 Page - List of Unclassifed Manufacturers