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MB9BF412RPMC-G-JNE2 Datasheet(PDF) 38 Page - Cypress Semiconductor |
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MB9BF412RPMC-G-JNE2 Datasheet(HTML) 38 Page - Cypress Semiconductor |
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38 / 112 page ![]() Document Number: 002-05615 Rev. *D Page 38 of 112 MB9B410R Series Module Pin name Function Pin No LQFP- 100 FBGA- 112 LQFP- 120 QFP- 100 Quadrature Position/ Revolution Counter 2 AIN2_0 QPRC ch.2 AIN input pin - - 10 - AIN2_1 83 D9 98 61 BIN2_0 QPRC ch.2 BIN input pin - - 11 - BIN2_1 84 A7 99 62 ZIN2_0 QPRC ch.2 ZIN input pin - - 12 - ZIN2_1 85 B7 100 63 Real-time clock RTCCO_0 0.5 seconds pulse output pin of Real-time clock 92 B5 107 70 RTCCO_1 55 H10 65 33 RTCCO_2 19 G3 24 97 SUBOUT_0 Sub clock output pin 92 B5 107 70 SUBOUT_1 55 H10 65 33 SUBOUT_2 19 G3 24 97 Reset INITX External Reset Input pin. A reset is valid when INITX="L". 38 K4 43 16 Mode MD0 Mode 0 pin. During normal operation, MD0="L" must be input. During serial programming to Flash memory, MD0="H" must be input. 47 L8 57 25 MD1 Mode 1 pin. During serial programming to Flash memory, MD1="L" must be input. 46 K9 56 24 Power VCC Power supply Pin 1 B1 1 79 VCC Power supply Pin 26 J1 31 4 VCC Power supply Pin 35 K1 40 13 VCC Power supply Pin 51 K11 61 29 VCC Power supply Pin 76 A10 91 54 VCC Power supply Pin 97 A4 117 75 GND VSS GND Pin - B2 - VSS GND Pin 25 L1 30 3 VSS GND Pin - K2 - VSS GND Pin - J3 - VSS GND Pin - H4 - VSS GND Pin 34 L4 39 12 VSS GND Pin 50 L11 60 28 VSS GND Pin - K10 - VSS GND Pin - J9 - VSS GND Pin - H8 - VSS GND Pin - B10 - VSS GND Pin - C9 - VSS GND Pin 75 A11 90 53 VSS GND Pin - D8 - VSS GND Pin - D4 - VSS GND Pin - C3 - VSS GND Pin 100 A1 120 78 |
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