MB9BF412RPMC-G-JNE2 datasheet(70/112 Pages) CYPRESS

70 / 112 page

Document Number: 002-05615 Rev. *D

Page

70 of 112

MB9B410R Series

12.4.6

Reset Input Characteristics

(VCC = 2.7V to 5.5V, VSS = 0V, TA = - 40°C to + 85°C)

Parameter

Symbol

name

Conditions

Value

Unit

Remarks

Min

Max

Reset input time

tINITX

INITX

500

12.4.7

Power-on Reset Timing

(VSS = 0V, TA = - 40°C to + 85°C)

Parameter

Symbol

Pin name

Conditions

Value

Unit

Remarks

Min

Typ

Max

Power supply shut down time

OFF

VCC

Power ramp rate

dV/dt

Vcc: 0.2 V to 2.70 V

0.8

1000

mV/μs

Time until releasing

Power-on reset

PRT

0.57

0.76

*1: VCC must be held below 0.2 V for minimum period of t

OFF

. Improper initialization may occur if this condition is not met.

*2: This dV/dt characteristic is applied at the power-on of cold start (t

OFF

>50 ms).

Note:

− If t

OFF

cannot be satisfied designs must assert external reset(INITX) at power-up and at any brownout event per “12. 4. 6.Reset

Input Characteristics”.

Glossary

VDH: detection voltage of Low Voltage detection reset. S

ee “12.6. Low-voltage Detection Characteristics”

VDH

tPRT

Internal RST

VCC

CPU Operation

start

RST Active

release

0.2V

tOFF

dV/dt

0.2V

2.7V

MB9BF412RPMC-G-JNE2 Datasheet(PDF) 70 Page - Cypress Semiconductor

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