| Electronic Components Datasheet Search |
|
MB9BF412RPMC-G-JNE2 Datasheet(PDF) 95 Page - Cypress Semiconductor |
|
|
|||||||||||||||||||||||||||||
MB9BF412RPMC-G-JNE2 Datasheet(HTML) 95 Page - Cypress Semiconductor |
|
95 / 112 page ![]() Document Number: 002-05615 Rev. *D Page 95 of 112 MB9B410R Series 12.5 12-bit A/D Converter Electrical Characteristics for the A/D Converter (VCC = AVCC = 2.7V to 5.5V, VSS = AVSS = 0V, TA = - 40°C to + 85°C) Parameter Symbol Pin name Value Unit Remarks Min Typ Max Resolution - - - - 12 bit Integral Nonlinearity - - - ± 4.0 ± 4.5 LSB AVRH = 2.7 V to 5.5 V Differential Nonlinearity - - - ± 2.3 ± 2.5 LSB Zero transition voltage VZT ANxx - ± 10 ± 15 mV Full-scale transition voltage VFST ANxx - AVRH ± 10 AVRH ± 15 mV Conversion time - - 1.0*1 - - μs AVCC ≥ 4.5 V 1.2*1 - - AVCC < 4.5 V Sampling time tS - *2 - - ns AVCC ≥ 4.5 V *2 - - AVCC < 4.5 V Compare clock cycle*3 tCCK - 50 - 2000 ns AVCC ≥ 4.5 V AVCC < 4.5 V State transition time to operation permission tSTT - - - 1.0 μs Analog input capacity CAIN - - - 12.9 pF Analog input resistance RAIN - - - 2 kΩ AVCC ≥ 4.5 V 3.8 AVCC < 4.5 V Interchannel disparity - - - - 4 LSB Analog port input leak current - ANxx - - 5 μA Analog input voltage - ANxx AVSS - AVRH V Reference voltage - AVRH 2.7 - AVCC V *1: Conversion time is the value of sampling time (tS) + compare time (tC). The condition of the minimum conversion time is the following. AVCC ≥ 4.5 V, HCLK=120 Hz sampling time: 300 ns, compare time: 700 ns AVCC < 4.5 V, HCLK=120 Hz sampling time: 500 ns, compare time: 700 ns Ensure that it satisfies the value of sampling time (tS) and compare clock cycle (tCCK). For setting*4 of sampling time and compare clock cycle, see CHAPTER 1-1: 12-bit A/D Converter in FM3 Family PERIPHERAL MANUAL Analog Macro Part. A/D Converter register is set at APB bus clock timing. Sampling and compare clock is set at Base clock (HCLK). About the APB bus number which the A/D Converter is connected to, see 8 Block Diagram in this data sheet. *2: A necessary sampling time changes by external impedance. Ensure that it set the sampling time to satisfy (Equation 1). *3: Compare time (tC) is the value of (Equation 2). |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |