ST20-GP1 datasheet(91/116 Pages) STMICROELECTRONICS

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ST20-GP1

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15.4.2 Valid/Ack protocol

In this mode the 2 control pins PlinknotReq (Qack/Ivalid) and PlinknotAck (Qvalid/Iack) are active

high. The initial (inactive) state of the 2 control wires is low.

Valid Ack output

An output transaction proceeds as follows.

The DMA is programmed to perform an

out and the DMA engine receives its ﬁrst byte in the

buffer from the EMI.

The PLink drives the data to the PlinkData0-7 pins and drives PlinknotAck (Qvalid) high.

The external device acknowledges receipt of the data by taking PlinknotReq (Qack) high.

The PLink can then take PlinknotAck (Qvalid) low.

The external device can take PlinknotReq (Qack) low ready for the next transaction.

Valid Ack input

An input transaction proceeds as follows.

The external device drives the data pins and PlinknotReq (Ivalid) is asserted high.

If the DMA engine has empty buffer space PlinkData0-7 is latched and PlinknotAck (Iack)

is driven high by the PLink. The DMA writes to the appropriate address in memory.

The external device can then drive PlinknotReq (Ivalid) low.

PlinknotAck (Iack) can be taken low. The external device can then initiate the next transac-

tion.

Figure 15.2 Valid/Ack protocol

ST20 Output

PlinknotAck

PlinknotReq

ST20 Input

PlinknotReq

PlinknotAck

PlinkData0-7

valid data

old data

(Qvalid)

(Qack)

(Ivalid)

(Iack)

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