ST20-GP1 datasheet(35/116 Pages) STMICROELECTRONICS

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6.2

Instruction characteristics

The Primary Instructions Table 6.3 gives the basic function code. Where the operand is less than

16, a single byte encodes the complete instruction. If the operand is greater than 15, one preﬁx

instruction (

pﬁx) is required for each additional four bits of the operand. If the operand is negative

the ﬁrst preﬁx instruction will be

nﬁx. Examples of pﬁx and nﬁx coding are given in Table 6.1.

Any instruction which is not in the instruction set tables is an invalid instruction and is ﬂagged

illegal, returning an error code to the trap handler, if loaded and enabled.

The Notes column of the tables indicates the descheduling and error features of an instruction as

described in Table 6.2.

Mnemonic

Function code

Memory code

ldc

#43

ldc

#35

is coded as

pﬁx

#23

ldc

#45

ldc

#987

is coded as

pﬁx

#29

pﬁx

#28

ldc

#47

ldc

-31 (

ldc #FFFFFFE1)

is coded as

nﬁx

#61

ldc

#41

Table 6.1 Preﬁx coding

Ident

Feature

Instruction can set an

IntegerError trap

Instruction can cause a

LoadTrap trap

Instruction can cause a

StoreTrap trap

Instruction can cause an

Overﬂow trap

Interruptible instruction

Instruction can be aborted and later restarted.

Instruction can deschedule

Instruction can timeslice

Table 6.2 Instruction features

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