ST20-GP1 datasheet(59/116 Pages) STMICROELECTRONICS

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ST20-GP1

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status of the lock and stall bits. Table 9.6 shows the format of the EMIConfigStatus register.

EMIConfigStall register

The EMIConfigStall register can be used to stall the EMI. When set it prevents the EMI from

accepting further requests from the CPU or communications subsystems. Its main use is intended

to be in systems which anticipate turning the power off; the EMI must be inactive during such an

event, otherwise battery backed memory may be corrupted.

This register, once set, can only be cleared by resetting the ST20-GP1.

9.6

Reset and bootstrap behavior

Table 9.8 shows the state of the EMI signals during reset. MemAddr2-19 are driven with a copy of

the value on the internal memory bus2-19.

Table 9.9 shows the conﬁguration values for all banks during and after reset. If the BootSource0-1

pins indicate that the ST20-GP1 will boot from ROM, the BusWidth is set to the correct value as

the ST20-GP1 comes out of reset.

EMIConﬁgStatus

EMI base address + #20

Read only

Bit

Bit field

Function

WrittenBank0

Bank 0 conﬁguration has been written to using a

devsw instruction.

WrittenBank1

Bank 1 conﬁguration has been written to using a

devsw instruction.

WrittenBank2

Bank 2 conﬁguration has been written to using a

devsw instruction.

WrittenBank3

Bank 3 conﬁguration has been written to using a

devsw instruction.

WriteLock

EMIConﬁgData0-3 registers are write protected.

MemStall

EMIConfigStall has been set.

31:6

Reserved

Table 9.6 EMIConfigStatus register format

EMIConﬁgStall

EMI base address + #30

Write only

Bit

Bit ﬁeld

Function

EMIStall

When set, this bit prevents the arbiter from granting any more accesses to the

memory subsystem.

Table 9.7 EMIConfigStall register format

Pins

Value

MemAddr2-19

Valid

MemAddr1

High

notMemCE0-3

All high

notMemOE0-1

All high

notMemWB0-1

All high

MemData0-15

High impedance

Table 9.8 EMI signal values during reset

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