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ST20-GP1 Datasheet(PDF) 46 Page - STMicroelectronics |
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ST20-GP1 Datasheet(HTML) 46 Page - STMicroelectronics |
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46 / 116 page  ST20-GP1 46/116 ® 7.2 Boot ROM When the processor boots from ROM, it jumps to a boot program held in ROM with an entry point 2 bytes from the top of memory at #7FFFFFFE. These 2 bytes are used to encode a negative jump of up to 256 bytes down in the ROM program. For large ROM programs it may then be necessary to encode a longer negative jump to reach the start of the routine. 7.3 Internal peripheral space On-chip peripherals are mapped to addresses in the top half of memory bank 2 (address range #20000000 to #3FFFFFFF). They can only be accessed by the device access instructions (see Table 6.19). When used with addresses in this range, the device instructions access the on-chip peripherals rather than external memory. For all other addresses the device instructions access memory. Standard load/store instructions to these addresses will access external memory. This area of memory is allocated to peripherals in 4K blocks, see the following memory map. |
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