ADAU1373BCBZ-R7 datasheet(55/296 Pages) AD

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ADAU1373

Rev. 0 | Page 55 of 296

ASYNCHRONOUS SAMPLE RATE CONVERTER

The ADAU1373 includes three bidirectional ASRCs to convert

the sample rate for the selected digital audio interface port. The

ASRCs can be set in automatic ratio detect mode to calculate the

required ratio between the input and internal sample rate. This

mode writes the value in Register 0x4A and Register 0x4B for

Digital Audio Interface A, Register 0x4C and Register 0x4D for

Digital Audio Interface B, and Register 0x4E and Register 0x4F for

Digital Audio Interface C. The automatic ratio detect can be

disabled, and the fractional value can be written into the same

registers for manual setting. The maximum sample rate is 48 kHz

for the ASRC, as well as for the internal DSP. This sets the limi-

tation on the ASRC such that the interface port sample rate

must be equal to or less than the internal core sample rate.

The output-to-input sample rate ratio number is split into the

integer part and the fractional part. The integer part is three bits

wide, and the fractional part is 12 bits wide. The total available

range is 1:8 to 8:1.

The ASRC is bidirectional and converts the sample rate at the

port side to the DSP side and vice versa. The DSP side of the

ASRC always works at the core sample rate and should be the

highest sample rate of all the ports.

manually for ASRCA, ASRCB, and ASRCC. The following

section explains the manual setting of the sample rate

conversion ratio.

Manual Setting of Sample Rate Conversion Ratio

Bits[6:4] in Register 0x4A contain the SRCAINT bits for the

integer portion; and the SRCARFRE_HI bits (Bits[3:0]), along

with the SRCAFRE_LOW bits (Bits[7:0] in Register 0x4B), form

the total 12-bit fractional portion.

Bits[6:4] in Register 0x4C contain the SRCBINT bits for the

integer portion; and the SRCBRFRE_HI bits (Bits[3:0]), along

with the SRCBRFRE_LOW bits (Bits[7:0] in Register 0x4D),

form the total 12-bit fractional portion.

Bits[6:4] in Register 0x4E contain the SRCCINT bits for the

integer portion; and the SRCCRFRE_HI bits (Bits[3:0]), along

with the SRCCRFRE_LOW bits (Bits[7:0] in Register 0x4F),

form the total 12-bit fractional portion.

The ratio can be calculated using the following steps:

Calculate the ratio.

Split the ratio number into integer and fractional parts.

Set M as the integer part of fS_DSP/fS_x_INT or fS_DSP/fS_x_EXT,

and set N as the fractional part.

Integer Part M can be set from 1 to 8 using Register 0x4A,

for ASRCA, ASRCB, and ASRCC, respectively.

Round Fractional Part N, using the following equation:

ROUND (N × 212) = ROUND (N × 4096)

Convert the number to hexadecimal format.

The fractional part is 12 bits wide with an upper nibble

(Bits[11:8]) and a lower byte (Bits[7:0]). The upper bits are set

using Register 0x4A, Register 0x4C, and Register 0x4E, Bits[3:0]

(SRCxRFRE_HI) and the lower byte is set using Register 0x4B,

for Digital Audio Interface A, Digital Audio Interface B, and

Digital Audio Interface C, respectively.

Example A

If the target sample rate is 48 kHz and the source sample rate is

44.1 kHz, then

48/44.1 = 1.088435

Separate the integer portion, which is 1, and the fractional

portion, which is 0.088435.

For the integer value of the ratio in hexadecimal format, set

SRCxINT, Bits[2:0] = 0x1 (hexadecimal).

Next, to enter the fractional value, first convert the number to

a 12-bit integer and then to hexadecimal format.

0.088435 × 4096 = 362.231 ≈ 362 = 0x16A (hex)

The upper nibble is 0x1 (hexadecimal), whereas the lower byte

is 0x6A (hexadecimal).

That is, SRCxRFRE_HI, Bits[3:0] = 0x1, and SRCxRFRE_LOW,

Bits[7:0] = 0x6A.

Example B

If the target sample rate is 44.1 kHz and the source sample rate

is 8 kHz, then

44.1/8 = 5.5125

Separate the integer portion, which is 5, and the fractional

portion, which is 0.5125.

For the integer value of the ratio in hexadecimal format, set

SRCxINT, Bits[2:0] = 0x5 (hexadecimal).

Next, to enter the fractional value, first convert the number to

a 12-bit integer and then to hexadecimal format.

0.5125 × 4096 = 2099.2 ≈ 131 = 0x83 (hex)

The upper nibble is 0x0 (hexadecimal), whereas the lower byte

is 0x83 (hexadecimal).That is, SRCxRFRE_HI, Bits[3:0] = 0x0,

and SRCxRFRE_LOW, Bits[7:0] = 0x83.

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