ADAU1373BCBZ-R7 datasheet(57/296 Pages) AD

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ADAU1373

Rev. 0 | Page 57 of 296

ALC

PRE

HPF

PRE

HPF

PRE

HPF

PRE

HPF

PRE

HPF

INTERFACE A

INPUT

INTERFACE A

OUTPUT

INTERFACE B

INPUT

INTERFACE C

INPUT

ADC

OUTPUT

DIGITAL MIC

OUTPUT

INTERFACE B

OUTPUT

INTERFACE C

OUTPUT

DAC1 INPUT

DAC2 INPUT

DE-EMPHASIS

FDSP_DIN0

FDSP_DIN1

FDSP_DIN2

FDSP_DIN3

FDSP_DIN4

FDSP_DOUT0

FDSP_DOUT1

FDSP_DOUT2

FDSP_DOUT3

FDSP_DOUT4

MDRC

7-BAND

BIQUAD

BASS

POST

HPF

DRC

FDSP_PRE_

MIX_MUX

FDSP

FDSP_POST_

MIX_MUX

NOTE: EITHER MDRC OR DRC CAN BE

USED AT A TIME

Figure 104. Fixed Function DSP (FDSP) Input and Output Connections and Available Processing Blocks

FIXED FUNCTION DSP (FDSP)

Figure 104 shows the fixed function DSP input and output

connections, as well as the available processing blocks. The

FDSP works at a 128 × fS clock rate and has five input and

output channels.

The five high-pass filters are available at the input channels to

help remove the dc offset. In addition, the following blocks are

provided to enhance the signal:

•

ALC

•

MDRC or three full-band DRCs

•

Seven-band EQ

•

3D enhancement

•

Bass enhancement

•

High-pass filter

HIGH-PASS FILTERS (HPFs)

The ADAU1373 provides five fully programmable HPFs in front

of the data path and one configurable HPF following the FDSP

blocks.

The five fully programmable HPFs (called pre-HPFs) are used

to remove the dc content or the low frequency components from

the input signals. An additional HPF, located at the end of the

FDSP chain and called the post-HPF, is designed to remove dc

or low frequency components that may be introduced by the

nonlinear processing in the FDSP blocks. All of these HPFs are

first-order IIR with changeable 3 dB cutoff frequencies.

Pre-HPFs

All coefficients of the five pre-HPFs are in 11-bit format and fully

programmable. Each coefficient takes up two register addresses,

from Register 0xB3 to Register 0xBC. For each coefficient, the

first register is the first eight MSB bits, and the second register is

the last three LSB bits. Register 0xBD provides an individual

control bit for each filter enable or disable.

The pre-HPF frequency transfer function is as follows:

)

(

−

where Parameter a is determined by the cutoff frequency, fC,

and related to the sample rate, fS. Use the following equations to

calculate Parameter a:

WC = 2 × π × fC/fS

a =

cos

sin

−

For the pre-HPF, the coefficients are quantized to 10 bits, so

that the decimal integer values of these coefficients are as

follows:

aINT = round(a × 2048)

Pre-HPF Working Example

If the required cutoff frequency for the first pre-HPF is 900 Hz

and the sampling rate is 48 kHz, then

wC = 2 × π × fC/fS = 0.1178097

a =

cos

sin

−

= 0.8886221

aINT = round(a × 2048) = 1820

aHEX = 71C

Therefore, set Bits[7:0] in Register 0xB3, Register 0xB5,

and Bits[2:0] in Register 0xB4, Register 0xB6, Register 0xB8,

ADAU1373BCBZ-R7 Datasheet(PDF) 57 Page - Analog Devices

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