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ADAU1373BCBZ-R7 Datasheet(PDF) 245 Page - Analog Devices |
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ADAU1373BCBZ-R7 Datasheet(HTML) 245 Page - Analog Devices |
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245 / 296 page  ADAU1373 Rev. 0 | Page 245 of 296 Bits Bit Name Settings Description Reset Access [3:0] ALCREC 1010 6.144 sec 1011 12.288 sec 1100 24.576 sec 1101 24.576 sec 1110 24.576 sec 1111 24.576 sec ALC_CTRL2 REGISTER Address: 0xC4, Reset: 0x00, Name: ALC_CTRL2 ALC Control Register Table 219. Bit Descriptions for ALC_CTRL2 Bits Bit Name Settings Description Reset Access [7:4] ALCLVL ALC Peak Limiter Threshold. ALC peak limiter threshold level setting. 0x0 RW 0000 −22.5 dBFS 0001 −21 dBFS 0010 −19.5 dBFS 0011 −18 dBFS 0100 −16.5 dBFS 0101 −15 dBFS 0110 −13.5 dBFS 0111 −12 dBFS 1000 −10.5 dBFS 1001 −9 dBFS 1010 −7.5 dBFS 1011 −6 dBFS 1100 −4.5 dBFS 1101 −3 dBFS 1110 −1.5 dBFS 1111 0 dBFS |
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