ADAU1373BCBZ-R7 datasheet(260/296 Pages) AD

260 / 296 page

ADAU1373

Rev. 0 | Page 260 of 296

Bits

Bit Name

Settings

Description

Reset

Access

DIGMICAEN

Enable/Disable Control for DMIC1_2_DATA Pin (Ball B4). Shares the

decimator with the ADC so that, when enabled, Digital Microphone 1 and 2

data is input into the decimator. The ADC output is disabled.

0x0

Disable (default)

Enable

GPIOSEL1 REGISTER

Address: 0xE3, Reset: 0x00, Name: GPIOSEL1

GPIO Configuration Control Register

Table 231. Bit Descriptions for GPIOSEL1

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

GPIO2SEL

GPIO2 Function Select.

0x0

0000

GPIO2 as PLL reference clock input

0001

GPIO2 as analog 8 MHz clock output

0010

GPIO2 as IRQ

0011

GPIO2 as MCLK1 output

0100

GPIO2 as MCLK2 output

0101

GPIO2 as output high

0110

GPIO2 as output low

[3:0]

GPIO1SEL

GPIO1 Function Select.

0x0

0000

GPIO1 as PLL reference clock input (default)

0001

GPIO1 as analog 8 MHz clock output

0010

GPIO1 as IRQ

0011

GPIO1 as MCLK1 output

0100

GPIO1 as MCLK2 output

0101

GPIO1 as output high

0110

GPIO1 as output low

ADAU1373BCBZ-R7 Datasheet(PDF) 260 Page - Analog Devices

ADAU1373BCBZ-R7 Datasheet(HTML) 260 Page - Analog Devices

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