MB96F348CWCPMC-GSE2 datasheet(78/109 Pages) CYPRESS

78 / 109 page

MB96340 Series

Document Number: 002-04579 Rev. *A

Page 78 of 109

RDX

  ALE  time

tRHLH

RDX, ALE

EACL:STS=1 and

EACL:ACE=1

3tCYC/2  10

other ECL:STS, EA-

CL:ACE setting

tCYC/2  10

Valid address

 ECLK  time

tAVCH

A[23:16], ECLK

tCYC  15

tADVCH

AD[15:0], ECLK

tCYC/2  15

RDX

  ECLK  time

tRLCH

RDX, ECLK

tCYC/2  10

ALE

  RDX  time

tLLRL

ALE, RDX

EACL:STS=0

tCYC/2  10

EACL:STS=1

 10

ECLK

  Valid data input

tCHDV

AD[15:0], ECLK

tCYC  50

(TA  40°C to 125°C, VCC  3.0 to 4.5V, VSS  0.0 V, IOdrive = 5mA, CL = 50pF)

Parameter

Symbol

Conditions

Value

Unit Remarks

Min

Max

ALE pulse width

tLHLL

ALE

EACL:STS=0 and

EACL:ACE=0

tCYC/2  8-

EACL:STS=1

tCYC  8-

EACL:STS=0 and

EACL:ACE=1

3tCYC/2  8-

Valid address

 ALE  time

tAVLL

ALE, A[23:16],

EACL:STS=0 and

EACL:ACE=0

tCYC  20

EACL:STS=1 and

EACL:ACE=0

3tCYC/2  20

EACL:STS=0 and

EACL:ACE=1

2tCYC  20

EACL:STS=1 and

EACL:ACE=1

5tCYC/2  20

tADVLL

ALE, AD[15:0]

EACL:STS=0 and

EACL:ACE=0

tCYC/2  20

EACL:STS=1 and

EACL:ACE=0

tCYC  20

EACL:STS=0 and

EACL:ACE=1

3tCYC/2  20

EACL:STS=1 and

EACL:ACE=1

2tCYC  20

ALE

  Address valid time

tLLAX

ALE, AD[15:0]

EACL:STS=0

tCYC/2  20

EACL:STS=1

-20

Valid address

 RDX  time

tAVRL

RDX, A[23:16]

EACL:ACE=0

3tCYC/2  20

EACL:ACE=1

5tCYC/2  20

tADVRL

RDX, AD[15:0]

EACL:ACE=0

tCYC  20

EACL:ACE=1

2tCYC  20

(TA  40°C to 125°C, VCC  5.0 V  10, VSS  0.0 V, IOdrive = 5mA, CL = 50pF)

Parameter

Symbol

Conditions

Value

Unit Remarks

Min

Max

MB96F348CWCPMC-GSE2 Datasheet(PDF) 78 Page - Cypress Semiconductor

MB96F348CWCPMC-GSE2 Datasheet(HTML) 78 Page - Cypress Semiconductor

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